Commit fa998ebb authored by Markos Chandras's avatar Markos Chandras
Browse files

MIPS: asm: cmpxchg: Update ISA constraints for MIPS R6 support 



MIPS R6 changed the opcodes for LL/SC instructions so we need to set
the correct ISA.

Cc: Matthew Fortune <Matthew.Fortune@imgtec.com>
Signed-off-by: default avatarMarkos Chandras <markos.chandras@imgtec.com>
parent 123e4b3b

arch/mips/include/asm/cmpxchg.h

+5 −5
Original line number Diff line number Diff line
@@ -39,11 +39,11 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) 


		do {

			__asm__ __volatile__(

			"	.set	arch=r4000			\n"

			"	.set	"MIPS_ISA_ARCH_LEVEL"		\n"

			"	ll	%0, %3		# xchg_u32	\n"

			"	.set	mips0				\n"

			"	move	%2, %z4				\n"

			"	.set	arch=r4000			\n"

			"	.set	"MIPS_ISA_ARCH_LEVEL"		\n"

			"	sc	%2, %1				\n"

			"	.set	mips0				\n"

			: "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m),
@@ -90,7 +90,7 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) 


		do {

			__asm__ __volatile__(

			"	.set	arch=r4000			\n"

			"	.set	"MIPS_ISA_ARCH_LEVEL"		\n"

			"	lld	%0, %3		# xchg_u64	\n"

			"	move	%2, %z4				\n"

			"	scd	%2, %1				\n"
@@ -165,12 +165,12 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz 
		__asm__ __volatile__(					\

		"	.set	push				\n"	\

		"	.set	noat				\n"	\

		"	.set	arch=r4000			\n"	\

		"	.set	"MIPS_ISA_ARCH_LEVEL"		\n"	\

		"1:	" ld "	%0, %2		# __cmpxchg_asm \n"	\

		"	bne	%0, %z3, 2f			\n"	\

		"	.set	mips0				\n"	\

		"	move	$1, %z4				\n"	\

		"	.set	arch=r4000			\n"	\

		"	.set	"MIPS_ISA_ARCH_LEVEL"		\n"	\

		"	" st "	$1, %1				\n"	\

		"	beqz	$1, 1b				\n"	\

		"	.set	pop				\n"	\

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