Commit fa28d821 authored by Uwe Kleine-König's avatar Uwe Kleine-König Committed by Shawn Guo
Browse files

ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi files



The imx-pwm driver supports 3 cells and this is the more flexible setting.
So use it by default and overwrite it back to two for the files that
reference the PWMs with just 2 cells to minimize changes.

This allows to drop explicit setting to 3 cells for the boards that already
depend on this. The boards that are now using 2 cells explicitly can be
converted to 3 individually.

Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 5c73d9ac
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+1 −1
Original line number Diff line number Diff line
@@ -125,7 +125,7 @@
			};

			pwm: pwm@208000 {
				#pwm-cells = <2>;
				#pwm-cells = <3>;
				compatible = "fsl,imx1-pwm";
				reg = <0x00208000 0x1000>;
				interrupts = <34>;
+4 −4
Original line number Diff line number Diff line
@@ -411,7 +411,7 @@

			pwm2: pwm@53fa0000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				#pwm-cells = <3>;
				reg = <0x53fa0000 0x4000>;
				clocks = <&clks 106>, <&clks 52>;
				clock-names = "ipg", "per";
@@ -430,7 +430,7 @@

			pwm3: pwm@53fa8000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				#pwm-cells = <3>;
				reg = <0x53fa8000 0x4000>;
				clocks = <&clks 107>, <&clks 52>;
				clock-names = "ipg", "per";
@@ -488,7 +488,7 @@

			pwm4: pwm@53fc8000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				#pwm-cells = <3>;
				reg = <0x53fc8000 0x4000>;
				clocks = <&clks 108>, <&clks 52>;
				clock-names = "ipg", "per";
@@ -535,7 +535,7 @@

			pwm1: pwm@53fe0000 {
				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
				#pwm-cells = <2>;
				#pwm-cells = <3>;
				reg = <0x53fe0000 0x4000>;
				clocks = <&clks 105>, <&clks 52>;
				clock-names = "ipg", "per";
+1 −1
Original line number Diff line number Diff line
@@ -134,7 +134,7 @@
			};

			pwm: pwm@10006000 {
				#pwm-cells = <2>;
				#pwm-cells = <3>;
				compatible = "fsl,imx27-pwm";
				reg = <0x10006000 0x1000>;
				interrupts = <23>;
+1 −1
Original line number Diff line number Diff line
@@ -327,7 +327,7 @@
				interrupts = <26>;
				clocks = <&clks 10>, <&clks 42>;
				clock-names = "ipg", "per";
				#pwm-cells = <2>;
				#pwm-cells = <3>;
				status = "disabled";
			};
		};
+2 −2
Original line number Diff line number Diff line
@@ -289,7 +289,7 @@
			};

			pwm1: pwm@53fb4000 {
				#pwm-cells = <2>;
				#pwm-cells = <3>;
				compatible = "fsl,imx50-pwm", "fsl,imx27-pwm";
				reg = <0x53fb4000 0x4000>;
				clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
@@ -299,7 +299,7 @@
			};

			pwm2: pwm@53fb8000 {
				#pwm-cells = <2>;
				#pwm-cells = <3>;
				compatible = "fsl,imx50-pwm", "fsl,imx27-pwm";
				reg = <0x53fb8000 0x4000>;
				clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>,
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