Commit fa1f9497 authored by Tomi Valkeinen's avatar Tomi Valkeinen
Browse files

Merge branch 'samsung-fb-next' of git://github.com/jingoo/linux into for-linus 

Samsung Framebuffer changes for the 3.8 merge window.

- The bit definitions of header file are updated.
- Some minor typos are fixed.
- Some minor bugs of s3c_fb_check_var() are fixed.

* 'samsung-fb-next' of git://github.com/jingoo/linux:
  video: s3c-fb: fix red offset and length for ARGB232 format
  video: s3c-fb: return an error when bpp is invalid
  video: s3c-fb: add "drop through" comment
  video: s3c-fb: use dev_get_drvdata() instead of platform_get_drvdata()
  video: s3c-fb: use FIMD_V8_VIDTCON0 for EXYNOS5 FIMD
  video: s3c-fb: fix help message for FB_S3C_DEBUG_REGWRITE
  video: s3c-fb: fix typo in comment
  video: s3c-fb: add the bit definitions for VIDCON0_VIDOUT_WB
  video: s3c-fb: move the bit definitions for DITHMODE register
  video: s3c-fb: move the bit definitions for WINxMAP and WPALCON register
  video: s3c-fb: move the bit definitions for VIDINTCON0 register
  video: s3c-fb: move the address definition for VIDOSD register
  video: s3c-fb: move the address definitions for VIDTCON registers
  video: s3c-fb: clean the bit definition for WINCON register
parents 00741202 5a9c30a3

drivers/video/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -2045,7 +2045,7 @@ config FB_S3C_DEBUG_REGWRITE 
       bool "Debug register writes"

       depends on FB_S3C

       ---help---

         Show all register writes via printk(KERN_DEBUG)

         Show all register writes via pr_debug()



config FB_S3C2410

	tristate "S3C2410 LCD framebuffer support"

drivers/video/s3c-fb.c

+11 −13
Original line number Diff line number Diff line
@@ -189,7 +189,7 @@ struct s3c_fb_vsync { 


/**

 * struct s3c_fb - overall hardware state of the hardware

 * @slock: The spinlock protection for this data sturucture.

 * @slock: The spinlock protection for this data structure.

 * @dev: The device that we bound to, for printing, etc.

 * @bus_clk: The clk (hclk) feeding our interface and possibly pixclk.

 * @lcd_clk: The clk (sclk) feeding pixclk.
@@ -268,10 +268,10 @@ static int s3c_fb_check_var(struct fb_var_screeninfo *var, 
	case 8:

		if (sfb->variant.palette[win->index] != 0) {

			/* non palletised, A:1,R:2,G:3,B:2 mode */

			var->red.offset		= 4;

			var->red.offset		= 5;

			var->green.offset	= 2;

			var->blue.offset	= 0;

			var->red.length		= 5;

			var->red.length		= 2;

			var->green.length	= 3;

			var->blue.length	= 2;

			var->transp.offset	= 7;
@@ -288,6 +288,7 @@ static int s3c_fb_check_var(struct fb_var_screeninfo *var, 
		/* 666 with one bit alpha/transparency */

		var->transp.offset	= 18;

		var->transp.length	= 1;

		/* drop through */

	case 18:

		var->bits_per_pixel	= 32;
@@ -329,6 +330,7 @@ static int s3c_fb_check_var(struct fb_var_screeninfo *var, 


	default:

		dev_err(sfb->dev, "invalid bpp\n");

		return -EINVAL;

	}



	dev_dbg(sfb->dev, "%s: verified parameters\n", __func__);
@@ -1544,8 +1546,7 @@ static int __devexit s3c_fb_remove(struct platform_device *pdev) 
#ifdef CONFIG_PM_SLEEP

static int s3c_fb_suspend(struct device *dev)

{

	struct platform_device *pdev = to_platform_device(dev);

	struct s3c_fb *sfb = platform_get_drvdata(pdev);

	struct s3c_fb *sfb = dev_get_drvdata(dev);

	struct s3c_fb_win *win;

	int win_no;
@@ -1572,8 +1573,7 @@ static int s3c_fb_suspend(struct device *dev) 


static int s3c_fb_resume(struct device *dev)

{

	struct platform_device *pdev = to_platform_device(dev);

	struct s3c_fb *sfb = platform_get_drvdata(pdev);

	struct s3c_fb *sfb = dev_get_drvdata(dev);

	struct s3c_fb_platdata *pd = sfb->pdata;

	struct s3c_fb_win *win;

	int win_no;
@@ -1623,7 +1623,7 @@ static int s3c_fb_resume(struct device *dev) 
		if (!win)

			continue;



		dev_dbg(&pdev->dev, "resuming window %d\n", win_no);

		dev_dbg(dev, "resuming window %d\n", win_no);

		s3c_fb_set_par(win->fbinfo);

	}
@@ -1636,8 +1636,7 @@ static int s3c_fb_resume(struct device *dev) 
#ifdef CONFIG_PM_RUNTIME

static int s3c_fb_runtime_suspend(struct device *dev)

{

	struct platform_device *pdev = to_platform_device(dev);

	struct s3c_fb *sfb = platform_get_drvdata(pdev);

	struct s3c_fb *sfb = dev_get_drvdata(dev);



	if (!sfb->variant.has_clksel)

		clk_disable_unprepare(sfb->lcd_clk);
@@ -1649,8 +1648,7 @@ static int s3c_fb_runtime_suspend(struct device *dev) 


static int s3c_fb_runtime_resume(struct device *dev)

{

	struct platform_device *pdev = to_platform_device(dev);

	struct s3c_fb *sfb = platform_get_drvdata(pdev);

	struct s3c_fb *sfb = dev_get_drvdata(dev);

	struct s3c_fb_platdata *pd = sfb->pdata;



	clk_prepare_enable(sfb->bus_clk);
@@ -1910,7 +1908,7 @@ static struct s3c_fb_driverdata s3c_fb_data_exynos4 = { 
static struct s3c_fb_driverdata s3c_fb_data_exynos5 = {

	.variant = {

		.nr_windows	= 5,

		.vidtcon	= VIDTCON0,

		.vidtcon	= FIMD_V8_VIDTCON0,

		.wincon		= WINCON(0),

		.winmap		= WINxMAP(0),

		.keycon		= WKEYCON,

include/video/samsung_fimd.h

+52 −116
Original line number Diff line number Diff line
@@ -24,12 +24,15 @@ 


#define VIDCON0					(0x00)

#define VIDCON0_INTERLACE			(1 << 29)

#define VIDCON0_VIDOUT_MASK			(0x3 << 26)

#define VIDCON0_VIDOUT_MASK			(0x7 << 26)

#define VIDCON0_VIDOUT_SHIFT			(26)

#define VIDCON0_VIDOUT_RGB			(0x0 << 26)

#define VIDCON0_VIDOUT_TV			(0x1 << 26)

#define VIDCON0_VIDOUT_I80_LDI0			(0x2 << 26)

#define VIDCON0_VIDOUT_I80_LDI1			(0x3 << 26)

#define VIDCON0_VIDOUT_WB_RGB			(0x4 << 26)

#define VIDCON0_VIDOUT_WB_I80_LDI0		(0x6 << 26)

#define VIDCON0_VIDOUT_WB_I80_LDI1		(0x7 << 26)



#define VIDCON0_L1_DATA_MASK			(0x7 << 23)

#define VIDCON0_L1_DATA_SHIFT			(23)
@@ -77,6 +80,7 @@ 
#define VIDCON1_LINECNT_MASK			(0x7ff << 16)

#define VIDCON1_LINECNT_SHIFT			(16)

#define VIDCON1_LINECNT_GET(_v)			(((_v) >> 16) & 0x7ff)

#define VIDCON1_FSTATUS_EVEN			(1 << 15)

#define VIDCON1_VSTATUS_MASK			(0x3 << 13)

#define VIDCON1_VSTATUS_SHIFT			(13)

#define VIDCON1_VSTATUS_VSYNC			(0x0 << 13)
@@ -116,6 +120,7 @@ 


/* VIDTCON0 */



#define VIDTCON0				(0x10)

#define VIDTCON0_VBPDE_MASK			(0xff << 24)

#define VIDTCON0_VBPDE_SHIFT			(24)

#define VIDTCON0_VBPDE_LIMIT			(0xff)
@@ -138,6 +143,7 @@ 


/* VIDTCON1 */



#define VIDTCON1				(0x14)

#define VIDTCON1_VFPDE_MASK			(0xff << 24)

#define VIDTCON1_VFPDE_SHIFT			(24)

#define VIDTCON1_VFPDE_LIMIT			(0xff)
@@ -158,6 +164,7 @@ 
#define VIDTCON1_HSPW_LIMIT			(0xff)

#define VIDTCON1_HSPW(_x)			((_x) << 0)



#define VIDTCON2				(0x18)

#define VIDTCON2				(0x18)

#define VIDTCON2_LINEVAL_E(_x)			((((_x) & 0x800) >> 11) << 23)

#define VIDTCON2_LINEVAL_MASK			(0x7ff << 11)
@@ -173,18 +180,27 @@ 


/* WINCONx */





#define WINCON(_win)				(0x20 + ((_win) * 4))

#define WINCONx_CSCWIDTH_MASK			(0x3 << 26)

#define WINCONx_CSCWIDTH_SHIFT			(26)

#define WINCONx_CSCWIDTH_WIDE			(0x0 << 26)

#define WINCONx_CSCWIDTH_NARROW			(0x3 << 26)

#define WINCONx_ENLOCAL				(1 << 22)

#define WINCONx_BUFSTATUS			(1 << 21)

#define WINCONx_BUFSEL				(1 << 20)

#define WINCONx_BUFAUTOEN			(1 << 19)

#define WINCONx_BITSWP				(1 << 18)

#define WINCONx_BYTSWP				(1 << 17)

#define WINCONx_HAWSWP				(1 << 16)

#define WINCONx_WSWP				(1 << 15)

#define WINCONx_YCbCr				(1 << 13)

#define WINCONx_BURSTLEN_MASK			(0x3 << 9)

#define WINCONx_BURSTLEN_SHIFT			(9)

#define WINCONx_BURSTLEN_16WORD			(0x0 << 9)

#define WINCONx_BURSTLEN_8WORD			(0x1 << 9)

#define WINCONx_BURSTLEN_4WORD			(0x2 << 9)



#define WINCONx_ENWIN				(1 << 0)



#define WINCON0_BPPMODE_MASK			(0xf << 2)

#define WINCON0_BPPMODE_SHIFT			(2)

#define WINCON0_BPPMODE_1BPP			(0x0 << 2)
@@ -196,9 +212,8 @@ 
#define WINCON0_BPPMODE_18BPP_666		(0x8 << 2)

#define WINCON0_BPPMODE_24BPP_888		(0xb << 2)



#define WINCON1_LOCALSEL_CAMIF			(1 << 23)

#define WINCON1_BLD_PIX				(1 << 6)



#define WINCON1_ALPHA_SEL			(1 << 1)

#define WINCON1_BPPMODE_MASK			(0xf << 2)

#define WINCON1_BPPMODE_SHIFT			(2)

#define WINCON1_BPPMODE_1BPP			(0x0 << 2)
@@ -216,6 +231,7 @@ 
#define WINCON1_BPPMODE_24BPP_A1887		(0xc << 2)

#define WINCON1_BPPMODE_25BPP_A1888		(0xd << 2)

#define WINCON1_BPPMODE_28BPP_A4888		(0xd << 2)

#define WINCON1_ALPHA_SEL			(1 << 1)



/* S5PV210 */

#define SHADOWCON				(0x34)
@@ -225,6 +241,9 @@ 
/* Local input channels (windows 0-2) */

#define SHADOWCON_CHx_LOCAL_ENABLE(_win)	(1 << (5 + (_win)))



/* VIDOSDx */



#define VIDOSD_BASE				(0x40)

#define VIDOSDxA_TOPLEFT_X_E(_x)		((((_x) & 0x800) >> 11) << 23)

#define VIDOSDxA_TOPLEFT_X_MASK			(0x7ff << 11)

#define VIDOSDxA_TOPLEFT_X_SHIFT		(11)
@@ -293,6 +312,7 @@ 


/* Interrupt controls and status */



#define VIDINTCON0				(0x130)

#define VIDINTCON0_FIFOINTERVAL_MASK		(0x3f << 20)

#define VIDINTCON0_FIFOINTERVAL_SHIFT		(20)

#define VIDINTCON0_FIFOINTERVAL_LIMIT		(0x3f)
@@ -321,6 +341,9 @@ 
#define VIDINTCON0_FIFIOSEL_SHIFT		(5)

#define VIDINTCON0_FIFIOSEL_WINDOW0		(0x1 << 5)

#define VIDINTCON0_FIFIOSEL_WINDOW1		(0x2 << 5)

#define VIDINTCON0_FIFIOSEL_WINDOW2		(0x10 << 5)

#define VIDINTCON0_FIFIOSEL_WINDOW3		(0x20 << 5)

#define VIDINTCON0_FIFIOSEL_WINDOW4		(0x40 << 5)



#define VIDINTCON0_FIFOLEVEL_MASK		(0x7 << 2)

#define VIDINTCON0_FIFOLEVEL_SHIFT		(2)
@@ -357,16 +380,39 @@ 
#define WxKEYCON1_COLVAL_LIMIT			(0xffffff)

#define WxKEYCON1_COLVAL(_x)			((_x) << 0)



/* Dithering control */

#define DITHMODE				(0x170)

#define DITHMODE_R_POS_MASK			(0x3 << 5)

#define DITHMODE_R_POS_SHIFT			(5)

#define DITHMODE_R_POS_8BIT			(0x0 << 5)

#define DITHMODE_R_POS_6BIT			(0x1 << 5)

#define DITHMODE_R_POS_5BIT			(0x2 << 5)

#define DITHMODE_G_POS_MASK			(0x3 << 3)

#define DITHMODE_G_POS_SHIFT			(3)

#define DITHMODE_G_POS_8BIT			(0x0 << 3)

#define DITHMODE_G_POS_6BIT			(0x1 << 3)

#define DITHMODE_G_POS_5BIT			(0x2 << 3)

#define DITHMODE_B_POS_MASK			(0x3 << 1)

#define DITHMODE_B_POS_SHIFT			(1)

#define DITHMODE_B_POS_8BIT			(0x0 << 1)

#define DITHMODE_B_POS_6BIT			(0x1 << 1)

#define DITHMODE_B_POS_5BIT			(0x2 << 1)

#define DITHMODE_DITH_EN			(1 << 0)



/* Window blanking (MAP) */



#define WINxMAP(_win)				(0x180 + ((_win) * 4))

#define WINxMAP_MAP				(1 << 24)

#define WINxMAP_MAP_COLOUR_MASK			(0xffffff << 0)

#define WINxMAP_MAP_COLOUR_SHIFT		(0)

#define WINxMAP_MAP_COLOUR_LIMIT		(0xffffff)

#define WINxMAP_MAP_COLOUR(_x)			((_x) << 0)



/* Winodw palette control */

#define WPALCON					(0x1A0)

#define WPALCON_PAL_UPDATE			(1 << 9)

#define WPALCON_W4PAL_16BPP_A555		(1 << 8)

#define WPALCON_W3PAL_16BPP_A555		(1 << 7)

#define WPALCON_W2PAL_16BPP_A555		(1 << 6)

#define WPALCON_W1PAL_MASK			(0x7 << 3)

#define WPALCON_W1PAL_SHIFT			(3)

#define WPALCON_W1PAL_25BPP_A888		(0x0 << 3)
@@ -376,7 +422,6 @@ 
#define WPALCON_W1PAL_18BPP			(0x4 << 3)

#define WPALCON_W1PAL_16BPP_A555		(0x5 << 3)

#define WPALCON_W1PAL_16BPP_565			(0x6 << 3)



#define WPALCON_W0PAL_MASK			(0x7 << 0)

#define WPALCON_W0PAL_SHIFT			(0)

#define WPALCON_W0PAL_25BPP_A888		(0x0 << 0)
@@ -394,115 +439,6 @@ 
#define BLENDCON_NEW_4BIT_ALPHA_VALUE		(0 << 0)



#define S3C_FB_MAX_WIN (5)  /* number of hardware windows available. */

#define VIDCON1_FSTATUS_EVEN	(1 << 15)



/* Video timing controls */

#define VIDTCON0				(0x10)

#define VIDTCON1				(0x14)

#define VIDTCON2				(0x18)



/* Window position controls */



#define WINCON(_win)				(0x20 + ((_win) * 4))



/* OSD1 and OSD4 do not have register D */



#define VIDOSD_BASE				(0x40)



#define VIDINTCON0				(0x130)



/* WINCONx */



#define WINCONx_CSCWIDTH_MASK			(0x3 << 26)

#define WINCONx_CSCWIDTH_SHIFT			(26)

#define WINCONx_CSCWIDTH_WIDE			(0x0 << 26)

#define WINCONx_CSCWIDTH_NARROW			(0x3 << 26)



#define WINCONx_ENLOCAL				(1 << 22)

#define WINCONx_BUFSTATUS			(1 << 21)

#define WINCONx_BUFSEL				(1 << 20)

#define WINCONx_BUFAUTOEN			(1 << 19)

#define WINCONx_YCbCr				(1 << 13)



#define WINCON1_LOCALSEL_CAMIF			(1 << 23)



#define WINCON2_LOCALSEL_CAMIF			(1 << 23)

#define WINCON2_BLD_PIX				(1 << 6)



#define WINCON2_ALPHA_SEL			(1 << 1)

#define WINCON2_BPPMODE_MASK			(0xf << 2)

#define WINCON2_BPPMODE_SHIFT			(2)

#define WINCON2_BPPMODE_1BPP			(0x0 << 2)

#define WINCON2_BPPMODE_2BPP			(0x1 << 2)

#define WINCON2_BPPMODE_4BPP			(0x2 << 2)

#define WINCON2_BPPMODE_8BPP_1232		(0x4 << 2)

#define WINCON2_BPPMODE_16BPP_565		(0x5 << 2)

#define WINCON2_BPPMODE_16BPP_A1555		(0x6 << 2)

#define WINCON2_BPPMODE_16BPP_I1555		(0x7 << 2)

#define WINCON2_BPPMODE_18BPP_666		(0x8 << 2)

#define WINCON2_BPPMODE_18BPP_A1665		(0x9 << 2)

#define WINCON2_BPPMODE_19BPP_A1666		(0xa << 2)

#define WINCON2_BPPMODE_24BPP_888		(0xb << 2)

#define WINCON2_BPPMODE_24BPP_A1887		(0xc << 2)

#define WINCON2_BPPMODE_25BPP_A1888		(0xd << 2)

#define WINCON2_BPPMODE_28BPP_A4888		(0xd << 2)



#define WINCON3_BLD_PIX				(1 << 6)



#define WINCON3_ALPHA_SEL			(1 << 1)

#define WINCON3_BPPMODE_MASK			(0xf << 2)

#define WINCON3_BPPMODE_SHIFT			(2)

#define WINCON3_BPPMODE_1BPP			(0x0 << 2)

#define WINCON3_BPPMODE_2BPP			(0x1 << 2)

#define WINCON3_BPPMODE_4BPP			(0x2 << 2)

#define WINCON3_BPPMODE_16BPP_565		(0x5 << 2)

#define WINCON3_BPPMODE_16BPP_A1555		(0x6 << 2)

#define WINCON3_BPPMODE_16BPP_I1555		(0x7 << 2)

#define WINCON3_BPPMODE_18BPP_666		(0x8 << 2)

#define WINCON3_BPPMODE_18BPP_A1665		(0x9 << 2)

#define WINCON3_BPPMODE_19BPP_A1666		(0xa << 2)

#define WINCON3_BPPMODE_24BPP_888		(0xb << 2)

#define WINCON3_BPPMODE_24BPP_A1887		(0xc << 2)

#define WINCON3_BPPMODE_25BPP_A1888		(0xd << 2)

#define WINCON3_BPPMODE_28BPP_A4888		(0xd << 2)



#define VIDINTCON0_FIFIOSEL_WINDOW2		(0x10 << 5)

#define VIDINTCON0_FIFIOSEL_WINDOW3		(0x20 << 5)

#define VIDINTCON0_FIFIOSEL_WINDOW4		(0x40 << 5)



#define DITHMODE				(0x170)

#define WINxMAP(_win)				(0x180 + ((_win) * 4))





#define DITHMODE_R_POS_MASK			(0x3 << 5)

#define DITHMODE_R_POS_SHIFT			(5)

#define DITHMODE_R_POS_8BIT			(0x0 << 5)

#define DITHMODE_R_POS_6BIT			(0x1 << 5)

#define DITHMODE_R_POS_5BIT			(0x2 << 5)



#define DITHMODE_G_POS_MASK			(0x3 << 3)

#define DITHMODE_G_POS_SHIFT			(3)

#define DITHMODE_G_POS_8BIT			(0x0 << 3)

#define DITHMODE_G_POS_6BIT			(0x1 << 3)

#define DITHMODE_G_POS_5BIT			(0x2 << 3)



#define DITHMODE_B_POS_MASK			(0x3 << 1)

#define DITHMODE_B_POS_SHIFT			(1)

#define DITHMODE_B_POS_8BIT			(0x0 << 1)

#define DITHMODE_B_POS_6BIT			(0x1 << 1)

#define DITHMODE_B_POS_5BIT			(0x2 << 1)



#define DITHMODE_DITH_EN			(1 << 0)



#define WPALCON					(0x1A0)



/* Palette control */

/* Note for S5PC100: you can still use those macros on WPALCON (aka WPALCON_L),

 * but make sure that WPALCON_H W2PAL-W4PAL entries are zeroed out */

#define WPALCON_W4PAL_16BPP_A555		(1 << 8)

#define WPALCON_W3PAL_16BPP_A555		(1 << 7)

#define WPALCON_W2PAL_16BPP_A555		(1 << 6)





/* Notes on per-window bpp settings

 *

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