spi/rockchip: fix bug that case spi can't go as fast as slave request (f9cfd522) · Commits · 戴 / test

Because the minimum divisor in rk3x's spi controller is 2, if spi_clk is less than 2 * sclk_out, we can't get the right divisor. So we must set spi_clk again to match slave request. Signed-off-by:

Addy Ke <addy.ke@rock-chips.com> Signed-off-by:

Mark Brown <broonie@kernel.org>

drivers/spi/spi-rockchip.c

+12 −0

Original line number	Diff line number	Diff line
		@@ -145,6 +145,9 @@
		#define RXBUSY (1 << 0)
		#define TXBUSY (1 << 1)

		/* sclk_out: spi master internal logic in rk3x can support 50Mhz */
		#define MAX_SCLK_OUT 50000000

		enum rockchip_ssi_type {
		SSI_MOTO_SPI = 0,
		SSI_TI_SSP,
		@@ -496,6 +499,15 @@ static void rockchip_spi_config(struct rockchip_spi *rs)
		dmacr \|= RF_DMA_EN;
		}

		if (WARN_ON(rs->speed > MAX_SCLK_OUT))
		rs->speed = MAX_SCLK_OUT;

		/* the minimum divsor is 2 */
		if (rs->max_freq < 2 * rs->speed) {
		clk_set_rate(rs->spiclk, 2 * rs->speed);
		rs->max_freq = clk_get_rate(rs->spiclk);
		}

		/* div doesn't support odd number */
		div = max_t(u32, rs->max_freq / rs->speed, 1);
		div = (div + 1) & 0xfffe;

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