Commit f9b76fd2 authored by Gabriel Fernandez's avatar Gabriel Fernandez Committed by Stephen Boyd
Browse files

clk: stm32mp1: remove unnecessary CLK_DIVIDER_ALLOW_ZERO flag 



The divisor of ethptp_k and ck_hse_rtc clocks is: 'value register
plus one'.
Then CLK_DIVIDER_ALLOW_ZERO flag has no effect and is useless here.

Signed-off-by: default avatarGabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent d3f2e33c

drivers/clk/clk-stm32mp1.c

+2 −3
Original line number Diff line number Diff line
@@ -1959,11 +1959,10 @@ static const struct clock_config stm32mp1_clock_cfg[] = { 
		  CLK_SET_RATE_NO_REPARENT,

		  _NO_GATE,

		  _MMUX(M_ETHCK),

		  _DIV(RCC_ETHCKSELR, 4, 4, CLK_DIVIDER_ALLOW_ZERO, NULL)),

		  _DIV(RCC_ETHCKSELR, 4, 4, 0, NULL)),



	/* RTC clock */

	DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 7,

	    CLK_DIVIDER_ALLOW_ZERO),

	DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 7, 0),



	COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE |

		   CLK_SET_RATE_PARENT,

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