Commit f98837e8 authored by José Roberto de Souza's avatar José Roberto de Souza
Browse files

drm/i915/psr: Add bits per pixel limitation 



PSR2 HW only support a limited number of bits per pixel, if mode has
more than supported PSR2 should not be enabled.

BSpec: 50422
BSpec: 7713
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191128014852.214135-1-jose.souza@intel.com
parent 13caf7be

drivers/gpu/drm/i915/display/intel_psr.c

+10 −1
Original line number Diff line number Diff line
@@ -608,7 +608,7 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, 
	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

	int crtc_hdisplay = crtc_state->hw.adjusted_mode.crtc_hdisplay;

	int crtc_vdisplay = crtc_state->hw.adjusted_mode.crtc_vdisplay;

	int psr_max_h = 0, psr_max_v = 0;

	int psr_max_h = 0, psr_max_v = 0, max_bpp = 0;



	if (!dev_priv->psr.sink_psr2_support)

		return false;
@@ -632,12 +632,15 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, 
	if (INTEL_GEN(dev_priv) >= 12) {

		psr_max_h = 5120;

		psr_max_v = 3200;

		max_bpp = 30;

	} else if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {

		psr_max_h = 4096;

		psr_max_v = 2304;

		max_bpp = 24;

	} else if (IS_GEN(dev_priv, 9)) {

		psr_max_h = 3640;

		psr_max_v = 2304;

		max_bpp = 24;

	}



	if (crtc_hdisplay > psr_max_h || crtc_vdisplay > psr_max_v) {
@@ -647,6 +650,12 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, 
		return false;

	}



	if (crtc_state->pipe_bpp > max_bpp) {

		DRM_DEBUG_KMS("PSR2 not enabled, pipe bpp %d > max supported %d\n",

			      crtc_state->pipe_bpp, max_bpp);

		return false;

	}



	/*

	 * HW sends SU blocks of size four scan lines, which means the starting

	 * X coordinate and Y granularity requirements will always be met. We

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