Commit f987c955 authored May 08, 2019 by Andi Kleen Committed by Thomas Gleixner Jun 22, 2019

x86/elf: Enumerate kernel FSGSBASE capability in AT_HWCAP2



The kernel needs to explicitly enable FSGSBASE. So, the application needs
to know if it can safely use these instructions. Just looking at the CPUID
bit is not enough because it may be running in a kernel that does not
enable the instructions.

One way for the application would be to just try and catch the SIGILL.
But that is difficult to do in libraries which may not want to overwrite
the signal handlers of the main application.

Enumerate the enabled FSGSBASE capability in bit 1 of AT_HWCAP2 in the ELF
aux vector. AT_HWCAP2 is already used by PPC for similar purposes.

The application can access it open coded or by using the getauxval()
function in newer versions of glibc.

[ tglx: Massaged changelog ]

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Ravi Shankar <ravi.v.shankar@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Link: https://lkml.kernel.org/r/1557309753-24073-18-git-send-email-chang.seok.bae@intel.com

parent 2032f1f9

arch/x86/include/uapi/asm/hwcap2.h

+3 −0

Original line number	Diff line number	Diff line
		@@ -5,4 +5,7 @@
		/* MONITOR/MWAIT enabled in Ring 3 */
		#define HWCAP2_RING3MWAIT (1 << 0)

		/* Kernel allows FSGSBASE instructions available in Ring 3 */
		#define HWCAP2_FSGSBASE BIT(1)

		#endif

arch/x86/kernel/cpu/common.c

+3 −1

Original line number	Diff line number	Diff line
		@@ -1387,8 +1387,10 @@ static void identify_cpu(struct cpuinfo_x86 *c)
		setup_umip(c);

		/* Enable FSGSBASE instructions if available. */
		if (cpu_has(c, X86_FEATURE_FSGSBASE))
		if (cpu_has(c, X86_FEATURE_FSGSBASE)) {
		cr4_set_bits(X86_CR4_FSGSBASE);
		elf_hwcap2 \|= HWCAP2_FSGSBASE;
		}

		/*
		* The vendor-specific functions might have changed features.

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