Commit f97b1a1d authored Nov 25, 2014 by Renwei Wu Committed by Barry Song Nov 25, 2014

ARM: dts: prima2: add resets property for VPP nodes



this patch adds missed resets property for CSR SiRFprimaII Video Post
Processor(VPP) node.

Signed-off-by: Renwei Wu <renwei.wu@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>

parent 1f634d74

arch/arm/boot/dts/prima2.dtsi

+1 −0

Original line number	Diff line number	Diff line
		@@ -137,6 +137,7 @@
		reg = <0x90020000 0x10000>;
		interrupts = <31>;
		clocks = <&clks 35>;
		resets = <&rstc 6>;
		};
		};

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