Commit f975ccb0 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

KVM: arm64: Remove PMU RAZ/WI handling 



There is no RAZ/WI handling allowed for the PMU registers in the
ARMv8 architecture. Nobody can remember how we cam to the conclusion
that we could do this, but the ARMv8 ARM is pretty clear that we cannot.

Remove the RAZ/WI handling of the PMU system registers when it is
not configured.

Reviewed-by: default avatarAlexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent b0737e99

arch/arm64/kvm/sys_regs.c

+0 −30
Original line number Diff line number Diff line
@@ -643,9 +643,6 @@ static bool access_pmcr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, 
{

	u64 val;



	if (!kvm_arm_pmu_v3_ready(vcpu))

		return trap_raz_wi(vcpu, p, r);



	if (pmu_access_el0_disabled(vcpu))

		return false;
@@ -672,9 +669,6 @@ static bool access_pmcr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, 
static bool access_pmselr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,

			  const struct sys_reg_desc *r)

{

	if (!kvm_arm_pmu_v3_ready(vcpu))

		return trap_raz_wi(vcpu, p, r);



	if (pmu_access_event_counter_el0_disabled(vcpu))

		return false;
@@ -693,9 +687,6 @@ static bool access_pmceid(struct kvm_vcpu *vcpu, struct sys_reg_params *p, 
{

	u64 pmceid;



	if (!kvm_arm_pmu_v3_ready(vcpu))

		return trap_raz_wi(vcpu, p, r);



	BUG_ON(p->is_write);



	if (pmu_access_el0_disabled(vcpu))
@@ -728,9 +719,6 @@ static bool access_pmu_evcntr(struct kvm_vcpu *vcpu, 
{

	u64 idx;



	if (!kvm_arm_pmu_v3_ready(vcpu))

		return trap_raz_wi(vcpu, p, r);



	if (r->CRn == 9 && r->CRm == 13) {

		if (r->Op2 == 2) {

			/* PMXEVCNTR_EL0 */
@@ -784,9 +772,6 @@ static bool access_pmu_evtyper(struct kvm_vcpu *vcpu, struct sys_reg_params *p, 
{

	u64 idx, reg;



	if (!kvm_arm_pmu_v3_ready(vcpu))

		return trap_raz_wi(vcpu, p, r);



	if (pmu_access_el0_disabled(vcpu))

		return false;
@@ -824,9 +809,6 @@ static bool access_pmcnten(struct kvm_vcpu *vcpu, struct sys_reg_params *p, 
{

	u64 val, mask;



	if (!kvm_arm_pmu_v3_ready(vcpu))

		return trap_raz_wi(vcpu, p, r);



	if (pmu_access_el0_disabled(vcpu))

		return false;
@@ -855,9 +837,6 @@ static bool access_pminten(struct kvm_vcpu *vcpu, struct sys_reg_params *p, 
{

	u64 mask = kvm_pmu_valid_counter_mask(vcpu);



	if (!kvm_arm_pmu_v3_ready(vcpu))

		return trap_raz_wi(vcpu, p, r);



	if (check_pmu_access_disabled(vcpu, 0))

		return false;
@@ -882,9 +861,6 @@ static bool access_pmovs(struct kvm_vcpu *vcpu, struct sys_reg_params *p, 
{

	u64 mask = kvm_pmu_valid_counter_mask(vcpu);



	if (!kvm_arm_pmu_v3_ready(vcpu))

		return trap_raz_wi(vcpu, p, r);



	if (pmu_access_el0_disabled(vcpu))

		return false;
@@ -907,9 +883,6 @@ static bool access_pmswinc(struct kvm_vcpu *vcpu, struct sys_reg_params *p, 
{

	u64 mask;



	if (!kvm_arm_pmu_v3_ready(vcpu))

		return trap_raz_wi(vcpu, p, r);



	if (!p->is_write)

		return read_from_write_only(vcpu, p, r);
@@ -924,9 +897,6 @@ static bool access_pmswinc(struct kvm_vcpu *vcpu, struct sys_reg_params *p, 
static bool access_pmuserenr(struct kvm_vcpu *vcpu, struct sys_reg_params *p,

			     const struct sys_reg_desc *r)

{

	if (!kvm_arm_pmu_v3_ready(vcpu))

		return trap_raz_wi(vcpu, p, r);



	if (!kvm_vcpu_has_pmu(vcpu)) {

		kvm_inject_undefined(vcpu);

		return false;

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