Commit f9367793 authored by Wei Chen's avatar Wei Chen Committed by Linus Walleij
Browse files

pinctrl: sirf: add sirf atlas7 pinctrl and gpio support 



The Pinctrl module (ioc) controls the Pad's function select
(each pad can have 8 functions), Pad's Drive Strength, Pad's
Pull Select and Pad's Input Disable status.

The ioc has two modules, ioc_top & ioc_rtc. Both of these two
modules have function select/clear, Pull select and Drive
Strength registers. But only ioc_rtc has input-disable
registers. The Pads on ioc_top have to access ioc_rtc to set
their input-disable status and intpu-disable-value.

So have to use one ioc driver instance to drive these two
ioc modules at the same time, and each ioc module will be
treat as one bank on the "IOC Device".

The GPIO Controller controls the GPIO status if the Pad has
been config as GPIO by Pinctrl already. Includes the GPIO
Input/output, Interrupt type, Interrupt Status, and Set/Get
Values.
The GPIO pull up/down are controlled by Pinctrl.

There are 7 GPIO Groups and splited into 3 MACROs in atlas7.
The GPIO Groups in one MACRO share one GPIO controllers, each
GPIO Group are treated as one GPIO bank.

For example:
In VDIFM macro, there is one GPIO Controller, it has 3 banks
to control 3 gpio groups. Its gpio name space is from 0 to 95.

The Device Tree can be written as following:

gpio-ranges = <&pinctrl 0 0 0>,
<&pinctrl 32 0 0>,
<&pinctrl 64 0 0>;

gpio-ranges-group-names = "gnss_gpio_grp",
"lcd_vip_gpio_grp",
"sdio_i2s_gpio_grp";

bank#0 is from 0~31, the pins are from pinctrl's "gnss_gpio_grp".
bank#2 is from 32~63, the pins are from pinctrl's "lcd_vip_gpio_grp".
bank#3 is from 64~95, the pins are from pinctrl's "sdio_i2s_gpio_grp".

Signed-off-by: default avatarWei Chen <Wei.Chen@csr.com>
Signed-off-by: default avatarBarry Song <Baohua.Song@csr.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 5ceb41ad

Documentation/devicetree/bindings/gpio/gpio-atlas7.txt

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CSR SiRFatlas7 GPIO controller bindings



Required properties:

- compatible	: "sirf,atlas7-gpio"

- reg		: Address range of the pinctrl registers

- interrupts	: Interrupts used by every GPIO group

- gpio-banks	: How many gpio banks on this controller

- gpio-controller : Indicates this device is a GPIO controller

- interrupt-controller  : Marks the device node as an interrupt controller



The GPIO controller also acts as an interrupt controller. It uses the default

two cells specifier as described in Documentation/devicetree/bindings/

interrupt-controller/interrupts.txt.



Example:



	gpio_0: gpio_mediam@17040000 {

		compatible = "sirf,atlas7-gpio";

		reg = <0x17040000 0x1000>;

		interrupts = <0 13 0>, <0 14 0>;



		#gpio-cells = <2>;

		#interrupt-cells = <2>;



		gpio-controller;

		interrupt-controller;



		gpio-banks = <2>;

		gpio-ranges = <&pinctrl 0 0 0>,

				<&pinctrl 32 0 0>;

		gpio-ranges-group-names = "lvds_gpio_grp",

					"uart_nand_gpio_grp";

	};



	leds {

		compatible = "gpio-leds";



		led1 {

			gpios = <&gpio_1 15 0>;

			...

		};



		led2 {

			gpios = <&gpio_2 34 0>;

			...

		};

	};



Please refer to gpio.txt in this directory for details of the common

gpio properties used by devices.

Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt

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CSR SiRFatlas7 pinmux controller



Required properties:

- compatible	: "sirf,atlas7-ioc"

- reg		: Address range of the pinctrl registers



For example, pinctrl might have properties like the following:

	pinctrl: ioc@18880000 {

			compatible = "sirf,atlas7-ioc";

			reg = <0x18880000 0x1000>;



			a_ac97_pmx: ac97@0 {

				ac97 {

					groups = "audio_ac97_grp";

					function = "audio_ac97";

				};

			};



			...



			sd2_pmx: sd2@0 {

				sd2 {

					groups = "sd2_grp0";

					function = "sd2";

				};

			};



			...





			sample0_cfg: sample0@0 {

				sample0 {

					pins = "ldd_0", "ldd_1";

					bias-pull-up;

				};

			};



			sample1_cfg: sample1@0 {

				sample1 {

					pins = "ldd_2", "ldd_3";

					input-schmitt-enable;

				};

			};



			sample2_cfg: sample2@0 {

				sample2 {

					groups = "uart4_nopause_grp";

					bias-pull-down;

				};

			};



			sample3_cfg: sample3@0 {

				sample3 {

					pins = "ldd_4", "ldd_5";

					drive-strength = <2>;

				};

			};

	};



Please refer to pinctrl-bindings.txt in this directory for details of the common

pinctrl bindings used by client devices.



SiRFatlas7's pinmux nodes act as a container for an abitrary number of subnodes.

Each of these subnodes represents some desired configuration for a group of pins.



Required subnode-properties:

- groups : An array of strings. Each string contains the name of a group.

- function: A string containing the name of the function to mux to the

  group.



  Valid values for group and function names can be found from looking at the

  group and function arrays in driver files:

  drivers/pinctrl/pinctrl-sirf.c



For example, pinctrl might have subnodes like the following:

	sd0_pmx: sd0@0 {

		sd0 {

			groups = "sd0_grp";

			function = "sd0";

		};

	};



	sd1_pmx0: sd1@0 {

		sd1 {

			groups = "sd1_grp0";

			function = "sd1_m0";

		};

	};



	sd1_pmx1: sd1@1 {

		sd1 {

			groups = "sd1_grp1";

			function = "sd1_m1";

		};

	};



For a specific board, if it wants to use sd1,

it can add the following to its board-specific .dts file.

sd1: sd@0x12340000 {

	pinctrl-names = "default";

	pinctrl-0 = <&sd1_pmx0>;

}



or



sd1: sd@0x12340000 {

	pinctrl-names = "default";

	pinctrl-0 = <&sd1_pmx1>;

}

drivers/pinctrl/Kconfig

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@@ -132,6 +132,8 @@ config PINCTRL_SIRF 
	bool "CSR SiRFprimaII pin controller driver"

	depends on ARCH_SIRF

	select PINMUX

	select PINCONF

	select GENERIC_PINCONF

	select GPIOLIB_IRQCHIP



config PINCTRL_PISTACHIO

drivers/pinctrl/sirf/Makefile

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@@ -3,3 +3,4 @@ 
obj-y	+= pinctrl-sirf.o

obj-y	+= pinctrl-prima2.o

obj-y	+= pinctrl-atlas6.o

obj-y	+= pinctrl-atlas7.o

drivers/pinctrl/sirf/pinctrl-atlas7.c

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File added.

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