Commit f9201325 authored by Jitao Shi's avatar Jitao Shi Committed by CK Hu
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dt-bindings: display: mediatek: update dsi supported chips 



Update device tree binding documentation for the dsi for
Mediatek MT8183 SoCs.

Signed-off-by: default avatarJitao Shi <jitao.shi@mediatek.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarCK Hu <ck.hu@mediatek.com>
parent 54ecb8f7

Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt

+2 −2
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@ channel output. 


Required properties:

- compatible: "mediatek,<chip>-dsi"

  the supported chips are mt2701 and mt8173.

  the supported chips are mt2701, mt8173 and mt8183.

- reg: Physical base address and length of the controller's registers

- interrupts: The interrupt signal from the function block.

- clocks: device clocks
@@ -26,7 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY. 


Required properties:

- compatible: "mediatek,<chip>-mipi-tx"

  the supported chips are mt2701 and mt8173.

  the supported chips are mt2701, mt8173 and mt8183.

- reg: Physical base address and length of the controller's registers

- clocks: PLL reference clock

- clock-output-names: name of the output clock line to the DSI encoder

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