Commit f8c79120 authored by Jon Hunter's avatar Jon Hunter Committed by Thierry Reding
Browse files

drm/tegra: sor: Prepare for generic PM domain support 



The SOR driver for Tegra requires the SOR power partition to be enabled.
Now that Tegra supports the generic PM domain framework we manage the
SOR power partition via this framework. However, the sequence for
gating/ungating the SOR power partition requires that the SOR reset is
asserted/de-asserted at the time the SOR power partition is
gated/ungated, respectively. Now that the reset control core assumes
that resets are exclusive, the Tegra generic PM domain code and the SOR
driver cannot request the same reset unless we mark the reset as shared.
Sharing resets will not work in this case because we cannot guarantee
that the reset will be asserted/de-asserted at the appropriate time.
Therefore, given that the Tegra generic PM domain code will handle the
resets, do not request the reset in the SOR driver if the SOR device has
a PM domain associated.

Signed-off-by: default avatarJon Hunter <jonathanh@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 64230aa0

drivers/gpu/drm/tegra/sor.c

+35 −22
Original line number Diff line number Diff line
@@ -2350,11 +2350,14 @@ static int tegra_sor_init(struct host1x_client *client) 
	 * XXX: Remove this reset once proper hand-over from firmware to

	 * kernel is possible.

	 */

	if (sor->rst) {

		err = reset_control_assert(sor->rst);

		if (err < 0) {

		dev_err(sor->dev, "failed to assert SOR reset: %d\n", err);

			dev_err(sor->dev, "failed to assert SOR reset: %d\n",

				err);

			return err;

		}

	}



	err = clk_prepare_enable(sor->clk);

	if (err < 0) {
@@ -2364,11 +2367,14 @@ static int tegra_sor_init(struct host1x_client *client) 


	usleep_range(1000, 3000);



	if (sor->rst) {

		err = reset_control_deassert(sor->rst);

		if (err < 0) {

		dev_err(sor->dev, "failed to deassert SOR reset: %d\n", err);

			dev_err(sor->dev, "failed to deassert SOR reset: %d\n",

				err);

			return err;

		}

	}



	err = clk_prepare_enable(sor->clk_safe);

	if (err < 0)
@@ -2601,12 +2607,15 @@ static int tegra_sor_probe(struct platform_device *pdev) 
		goto remove;

	}



	if (!pdev->dev.pm_domain) {

		sor->rst = devm_reset_control_get(&pdev->dev, "sor");

		if (IS_ERR(sor->rst)) {

			err = PTR_ERR(sor->rst);

		dev_err(&pdev->dev, "failed to get reset control: %d\n", err);

			dev_err(&pdev->dev, "failed to get reset control: %d\n",

				err);

			goto remove;

		}

	}



	sor->clk = devm_clk_get(&pdev->dev, NULL);

	if (IS_ERR(sor->clk)) {
@@ -2711,11 +2720,13 @@ static int tegra_sor_suspend(struct device *dev) 
	struct tegra_sor *sor = dev_get_drvdata(dev);

	int err;



	if (sor->rst) {

		err = reset_control_assert(sor->rst);

		if (err < 0) {

			dev_err(dev, "failed to assert reset: %d\n", err);

			return err;

		}

	}



	usleep_range(1000, 2000);
@@ -2737,12 +2748,14 @@ static int tegra_sor_resume(struct device *dev) 


	usleep_range(1000, 2000);



	if (sor->rst) {

		err = reset_control_deassert(sor->rst);

		if (err < 0) {

			dev_err(dev, "failed to deassert reset: %d\n", err);

			clk_disable_unprepare(sor->clk);

			return err;

		}

	}



	return 0;

}

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