Commit f864c46a authored by Linus Walleij's avatar Linus Walleij
Browse files

mfd: dbx500/abx500: root out hardcoded IRQ assignments 



The DBx500 and ABx500 should be getting their IRQs from the
device tree and nowhere else. Get rid of all the static assignments
everywhere, delete it from the driver, platform data and the
board files in one swift strike.

Lots of cross-dependencies in the MFD drivers for PRCMU and
AB8500 makes it necessary to strike everywhere at once to
eradicate IRQs passed as resources and platform data to the left
and right around the platform.

Cc: Mark Brown <broonie@kernel.org>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Acked-by: default avatarLee Jones <lee.jones@linaro.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 8cc00715

arch/arm/mach-ux500/board-mop500-audio.c

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@@ -9,7 +9,6 @@ 
#include <linux/gpio.h>

#include <linux/platform_data/dma-ste-dma40.h>



#include "irqs.h"

#include <linux/platform_data/asoc-ux500-msp.h>



#include "ste-dma40-db8500.h"

arch/arm/mach-ux500/cpu-db8500.c

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@@ -27,7 +27,6 @@ 
#include <asm/mach/map.h>



#include "setup.h"

#include "irqs.h"



#include "board-mop500-regulators.h"

#include "board-mop500.h"
@@ -35,14 +34,11 @@ 
#include "id.h"



struct ab8500_platform_data ab8500_platdata = {

	.irq_base	= MOP500_AB8500_IRQ_BASE,

	.regulator	= &ab8500_regulator_plat_data,

};



struct prcmu_pdata db8500_prcmu_pdata = {

	.ab_platdata	= &ab8500_platdata,

	.ab_irq		= IRQ_DB8500_AB8500,

	.irq_base	= IRQ_PRCMU_BASE,

	.version_offset	= DB8500_PRCMU_FW_VERSION_OFFSET,

	.legacy_offset	= DB8500_PRCMU_LEGACY_OFFSET,

};

arch/arm/mach-ux500/irqs-board-mop500.h

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/*

 * Copyright (C) ST-Ericsson SA 2010

 *

 * Author: Rabin Vincent <rabin.vincent@stericsson.com>

 * License terms: GNU General Public License (GPL) version 2

 */



#ifndef __MACH_IRQS_BOARD_MOP500_H

#define __MACH_IRQS_BOARD_MOP500_H



/* Number of AB8500 irqs is taken from header file */

#include <linux/mfd/abx500/ab8500.h>



#define MOP500_AB8500_IRQ_BASE		IRQ_BOARD_START

#define MOP500_AB8500_IRQ_END		(MOP500_AB8500_IRQ_BASE \

					 + AB8500_MAX_NR_IRQS)



/* TC35892 */

#define TC35892_NR_INTERNAL_IRQS	8

#define TC35892_INT_GPIO(x)		(TC35892_NR_INTERNAL_IRQS + (x))

#define TC35892_NR_GPIOS		24

#define TC35892_NR_IRQS			TC35892_INT_GPIO(TC35892_NR_GPIOS)



#define MOP500_EGPIO_NR_IRQS		TC35892_NR_IRQS



#define MOP500_EGPIO_IRQ_BASE		MOP500_AB8500_IRQ_END

#define MOP500_EGPIO_IRQ_END		(MOP500_EGPIO_IRQ_BASE \

					 + MOP500_EGPIO_NR_IRQS)

/* STMPE1601 irqs */

#define STMPE_NR_INTERNAL_IRQS          9

#define STMPE_INT_GPIO(x)               (STMPE_NR_INTERNAL_IRQS + (x))

#define STMPE_NR_GPIOS                  24

#define STMPE_NR_IRQS                   STMPE_INT_GPIO(STMPE_NR_GPIOS)



#define MOP500_STMPE1601_IRQBASE        MOP500_EGPIO_IRQ_END

#define MOP500_STMPE1601_IRQ(x)         (MOP500_STMPE1601_IRQBASE + (x))



#define MOP500_STMPE1601_IRQ_END	\

	MOP500_STMPE1601_IRQ(STMPE_NR_INTERNAL_IRQS)



#define MOP500_NR_IRQS		MOP500_STMPE1601_IRQ_END



#define MOP500_IRQ_END		MOP500_NR_IRQS



/*

 * We may have several boards, but only one will run at a

 * time, so the one with most IRQs will bump this ahead,

 * but the IRQ_BOARD_START remains the same for either board.

 */

#if MOP500_IRQ_END > IRQ_BOARD_END

#undef IRQ_BOARD_END

#define IRQ_BOARD_END	MOP500_IRQ_END

#endif



#endif

arch/arm/mach-ux500/irqs-db8500.h

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/*

 * Copyright (C) ST-Ericsson SA 2010

 *

 * Author: Rabin Vincent <rabin.vincent@stericsson.com>

 * License terms: GNU General Public License (GPL) version 2

 */



#ifndef __MACH_IRQS_DB8500_H

#define __MACH_IRQS_DB8500_H



#define IRQ_DB8500_MTU0			(IRQ_SHPI_START + 4)

#define IRQ_DB8500_SPI2			(IRQ_SHPI_START + 6)

#define IRQ_DB8500_PMU			(IRQ_SHPI_START + 7)

#define IRQ_DB8500_SPI0			(IRQ_SHPI_START + 8)

#define IRQ_DB8500_RTT			(IRQ_SHPI_START + 9)

#define IRQ_DB8500_PKA			(IRQ_SHPI_START + 10)

#define IRQ_DB8500_UART0		(IRQ_SHPI_START + 11)

#define IRQ_DB8500_I2C3			(IRQ_SHPI_START + 12)

#define IRQ_DB8500_L2CC			(IRQ_SHPI_START + 13)

#define IRQ_DB8500_SSP0			(IRQ_SHPI_START + 14)

#define IRQ_DB8500_CRYP1		(IRQ_SHPI_START + 15)

#define IRQ_DB8500_MSP1_RX		(IRQ_SHPI_START + 16)

#define IRQ_DB8500_MTU1			(IRQ_SHPI_START + 17)

#define IRQ_DB8500_RTC			(IRQ_SHPI_START + 18)

#define IRQ_DB8500_UART1		(IRQ_SHPI_START + 19)

#define IRQ_DB8500_USB_WAKEUP		(IRQ_SHPI_START + 20)

#define IRQ_DB8500_I2C0			(IRQ_SHPI_START + 21)

#define IRQ_DB8500_I2C1			(IRQ_SHPI_START + 22)

#define IRQ_DB8500_USBOTG		(IRQ_SHPI_START + 23)

#define IRQ_DB8500_DMA_SECURE		(IRQ_SHPI_START + 24)

#define IRQ_DB8500_DMA			(IRQ_SHPI_START + 25)

#define IRQ_DB8500_UART2		(IRQ_SHPI_START + 26)

#define IRQ_DB8500_ICN_PMU1		(IRQ_SHPI_START + 27)

#define IRQ_DB8500_ICN_PMU2		(IRQ_SHPI_START + 28)

#define IRQ_DB8500_HSIR_EXCEP		(IRQ_SHPI_START + 29)

#define IRQ_DB8500_MSP0			(IRQ_SHPI_START + 31)

#define IRQ_DB8500_HSIR_CH0_OVRRUN	(IRQ_SHPI_START + 32)

#define IRQ_DB8500_HSIR_CH1_OVRRUN	(IRQ_SHPI_START + 33)

#define IRQ_DB8500_HSIR_CH2_OVRRUN	(IRQ_SHPI_START + 34)

#define IRQ_DB8500_HSIR_CH3_OVRRUN	(IRQ_SHPI_START + 35)

#define IRQ_DB8500_HSIR_CH4_OVRRUN	(IRQ_SHPI_START + 36)

#define IRQ_DB8500_HSIR_CH5_OVRRUN	(IRQ_SHPI_START + 37)

#define IRQ_DB8500_HSIR_CH6_OVRRUN	(IRQ_SHPI_START + 38)

#define IRQ_DB8500_HSIR_CH7_OVRRUN	(IRQ_SHPI_START + 39)

#define IRQ_DB8500_AB8500		(IRQ_SHPI_START + 40)

#define IRQ_DB8500_SDMMC2		(IRQ_SHPI_START + 41)

#define IRQ_DB8500_SIA			(IRQ_SHPI_START + 42)

#define IRQ_DB8500_SIA2			(IRQ_SHPI_START + 43)

#define IRQ_DB8500_SVA			(IRQ_SHPI_START + 44)

#define IRQ_DB8500_SVA2			(IRQ_SHPI_START + 45)

#define IRQ_DB8500_PRCMU0		(IRQ_SHPI_START + 46)

#define IRQ_DB8500_PRCMU1		(IRQ_SHPI_START + 47)

#define IRQ_DB8500_DISP			(IRQ_SHPI_START + 48)

#define IRQ_DB8500_SPI3			(IRQ_SHPI_START + 49)

#define IRQ_DB8500_SDMMC1		(IRQ_SHPI_START + 50)

#define IRQ_DB8500_I2C4			(IRQ_SHPI_START + 51)

#define IRQ_DB8500_SSP1			(IRQ_SHPI_START + 52)

#define IRQ_DB8500_SKE			(IRQ_SHPI_START + 53)

#define IRQ_DB8500_KB			(IRQ_SHPI_START + 54)

#define IRQ_DB8500_I2C2			(IRQ_SHPI_START + 55)

#define IRQ_DB8500_B2R2			(IRQ_SHPI_START + 56)

#define IRQ_DB8500_CRYP0		(IRQ_SHPI_START + 57)

#define IRQ_DB8500_SDMMC3		(IRQ_SHPI_START + 59)

#define IRQ_DB8500_SDMMC0		(IRQ_SHPI_START + 60)

#define IRQ_DB8500_HSEM			(IRQ_SHPI_START + 61)

#define IRQ_DB8500_MSP1			(IRQ_SHPI_START + 62)

#define IRQ_DB8500_SBAG			(IRQ_SHPI_START + 63)

#define IRQ_DB8500_SPI1			(IRQ_SHPI_START + 96)

#define IRQ_DB8500_SRPTIMER		(IRQ_SHPI_START + 97)

#define IRQ_DB8500_MSP2			(IRQ_SHPI_START + 98)

#define IRQ_DB8500_SDMMC4		(IRQ_SHPI_START + 99)

#define IRQ_DB8500_SDMMC5		(IRQ_SHPI_START + 100)

#define IRQ_DB8500_HSIRD0		(IRQ_SHPI_START + 104)

#define IRQ_DB8500_HSIRD1		(IRQ_SHPI_START + 105)

#define IRQ_DB8500_HSITD0		(IRQ_SHPI_START + 106)

#define IRQ_DB8500_HSITD1		(IRQ_SHPI_START + 107)

#define IRQ_DB8500_CTI0			(IRQ_SHPI_START + 108)

#define IRQ_DB8500_CTI1			(IRQ_SHPI_START + 109)

#define IRQ_DB8500_ICN_ERR		(IRQ_SHPI_START + 110)

#define IRQ_DB8500_MALI_PPMMU		(IRQ_SHPI_START + 112)

#define IRQ_DB8500_MALI_PP		(IRQ_SHPI_START + 113)

#define IRQ_DB8500_MALI_GPMMU		(IRQ_SHPI_START + 114)

#define IRQ_DB8500_MALI_GP		(IRQ_SHPI_START + 115)

#define IRQ_DB8500_MALI			(IRQ_SHPI_START + 116)

#define IRQ_DB8500_PRCMU_SEM		(IRQ_SHPI_START + 118)

#define IRQ_DB8500_GPIO0		(IRQ_SHPI_START + 119)

#define IRQ_DB8500_GPIO1		(IRQ_SHPI_START + 120)

#define IRQ_DB8500_GPIO2		(IRQ_SHPI_START + 121)

#define IRQ_DB8500_GPIO3		(IRQ_SHPI_START + 122)

#define IRQ_DB8500_GPIO4		(IRQ_SHPI_START + 123)

#define IRQ_DB8500_GPIO5		(IRQ_SHPI_START + 124)

#define IRQ_DB8500_GPIO6		(IRQ_SHPI_START + 125)

#define IRQ_DB8500_GPIO7		(IRQ_SHPI_START + 126)

#define IRQ_DB8500_GPIO8		(IRQ_SHPI_START + 127)



#define IRQ_CA_WAKE_REQ_ED			(IRQ_SHPI_START + 71)

#define IRQ_AC_READ_NOTIFICATION_0_ED		(IRQ_SHPI_START + 66)

#define IRQ_AC_READ_NOTIFICATION_1_ED		(IRQ_SHPI_START + 64)

#define IRQ_CA_MSG_PEND_NOTIFICATION_0_ED	(IRQ_SHPI_START + 67)

#define IRQ_CA_MSG_PEND_NOTIFICATION_1_ED	(IRQ_SHPI_START + 65)



#define IRQ_CA_WAKE_REQ_V1			(IRQ_SHPI_START + 83)

#define IRQ_AC_READ_NOTIFICATION_0_V1		(IRQ_SHPI_START + 78)

#define IRQ_AC_READ_NOTIFICATION_1_V1		(IRQ_SHPI_START + 76)

#define IRQ_CA_MSG_PEND_NOTIFICATION_0_V1	(IRQ_SHPI_START + 79)

#define IRQ_CA_MSG_PEND_NOTIFICATION_1_V1	(IRQ_SHPI_START + 77)



#ifdef CONFIG_UX500_SOC_DB8500



/* Virtual interrupts corresponding to the PRCMU wakeups.  */

#define IRQ_PRCMU_BASE IRQ_SOC_START

#define IRQ_PRCMU_END (IRQ_PRCMU_BASE + 23)



/*

 * We may have several SoCs, but only one will run at a

 * time, so the one with most IRQs will bump this ahead,

 * but the IRQ_SOC_START remains the same for either SoC.

 */

#if IRQ_SOC_END < IRQ_PRCMU_END

#undef IRQ_SOC_END

#define IRQ_SOC_END IRQ_PRCMU_END

#endif



#endif /* CONFIG_UX500_SOC_DB8500 */

#endif

arch/arm/mach-ux500/irqs.h

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Original line number Diff line number Diff line 
/*

 *  Copyright (C) 2008 STMicroelectronics

 *  Copyright (C) 2009 ST-Ericsson.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 */

#ifndef ASM_ARCH_IRQS_H

#define ASM_ARCH_IRQS_H



#define IRQ_LOCALTIMER			29

#define IRQ_LOCALWDOG			30



/* Shared Peripheral Interrupt (SHPI) */

#define IRQ_SHPI_START			32



/*

 * MTU0 preserved for now until plat-nomadik is taught not to use it.  Don't

 * add any other IRQs here, use the irqs-dbx500.h files.

 */

#define IRQ_MTU0		(IRQ_SHPI_START + 4)



#define DBX500_NR_INTERNAL_IRQS		166



/* After chip-specific IRQ numbers we have the GPIO ones */

#define NOMADIK_NR_GPIO			288

#define NOMADIK_GPIO_TO_IRQ(gpio)	((gpio) + DBX500_NR_INTERNAL_IRQS)

#define NOMADIK_IRQ_TO_GPIO(irq)	((irq) - DBX500_NR_INTERNAL_IRQS)

#define IRQ_GPIO_END			NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO)



#define IRQ_SOC_START		IRQ_GPIO_END

/* This will be overridden by SoC-specific irq headers */

#define IRQ_SOC_END		IRQ_SOC_START



#include "irqs-db8500.h"



#define IRQ_BOARD_START		IRQ_SOC_END

/* This will be overridden by board-specific irq headers */

#define IRQ_BOARD_END		IRQ_BOARD_START



#ifdef CONFIG_MACH_MOP500

#include "irqs-board-mop500.h"

#endif



#define UX500_NR_IRQS		IRQ_BOARD_END



#endif /* ASM_ARCH_IRQS_H */

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