Commit f82c916c authored by Charlene Liu's avatar Charlene Liu Committed by Alex Deucher
Browse files

drm/amd/display: add some parameters to validate bandwidth functions 



required for new checks.

Signed-off-by: default avatarCharlene Liu <charlene.liu@amd.com>
Reviewed-by: default avatarCharlene Liu <Charlene.Liu@amd.com>
Acked-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 39a4eb85

drivers/gpu/drm/amd/display/dc/dc_types.h

+8 −0
Original line number Diff line number Diff line
@@ -574,6 +574,14 @@ struct dc_info_packet { 
	uint8_t sb[32];

};



struct dc_info_packet_128 {

	bool valid;

	uint8_t hb0;

	uint8_t hb1;

	uint8_t hb2;

	uint8_t hb3;

	uint8_t sb[128];

};

#define DC_PLANE_UPDATE_TIMES_MAX 10



struct dc_plane_flip_time {

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c

+2 −1
Original line number Diff line number Diff line
@@ -2364,7 +2364,8 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, 
				pipe_cnt,

				pipe_idx,

				cstate_en,

				context->bw_ctx.bw.dcn.clk.p_state_change_support);

				context->bw_ctx.bw.dcn.clk.p_state_change_support,

				false, false, false);



		context->bw_ctx.dml.funcs.rq_dlg_get_rq_reg(&context->bw_ctx.dml,

				&context->res_ctx.pipe_ctx[i].rq_regs,

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c

+1 −8
Original line number Diff line number Diff line
@@ -204,14 +204,7 @@ static void enc2_stream_encoder_stop_hdmi_info_packets( 
}



#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT

struct dc_info_packet_128 {

	bool valid;

	uint8_t hb0;

	uint8_t hb1;

	uint8_t hb2;

	uint8_t hb3;

	uint8_t sb[128];

};





/* Update GSP7 SDP 128 byte long */

static void enc2_send_gsp7_128_info_packet(

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c

+4 −1
Original line number Diff line number Diff line
@@ -1567,7 +1567,10 @@ void dml20_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib, 
		const unsigned int num_pipes,

		const unsigned int pipe_idx,

		const bool cstate_en,

		const bool pstate_en)

		const bool pstate_en,

		const bool vm_en,

		const bool ignore_viewport_pos,

		const bool immediate_flip_support)

{

	display_rq_params_st rq_param = {0};

	display_dlg_sys_params_st dlg_sys_param = {0};

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.h

+4 −1
Original line number Diff line number Diff line
@@ -66,6 +66,9 @@ void dml20_rq_dlg_get_dlg_reg( 
		const unsigned int num_pipes,

		const unsigned int pipe_idx,

		const bool cstate_en,

		const bool pstate_en);

		const bool pstate_en,

		const bool vm_en,

		const bool ignore_viewport_pos,

		const bool immediate_flip_support);



#endif

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