Commit f820ca29 authored by Patrick Havelange's avatar Patrick Havelange Committed by Shawn Guo
Browse files

ARM: dts: ls1021a: add nodes for PWMs 



The LS1021A has 8 possible PWMs, so adding them (disabled by default)

Signed-off-by: default avatarPatrick Havelange <patrick.havelange@essensium.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 7ccdc892

arch/arm/boot/dts/ls1021a.dtsi

+96 −0
Original line number Diff line number Diff line
@@ -527,6 +527,102 @@ 
			status = "disabled";

		};



		pwm0: pwm@29d0000 {

			compatible = "fsl,vf610-ftm-pwm";

			#pwm-cells = <3>;

			reg = <0x0 0x29d0000 0x0 0x10000>;

			clock-names = "ftm_sys", "ftm_ext",

				"ftm_fix", "ftm_cnt_clk_en";

			clocks = <&clockgen 4 1>, <&clockgen 4 1>,

				<&clockgen 4 1>, <&clockgen 4 1>;

			big-endian;

			status = "disabled";

		};



		pwm1: pwm@29e0000 {

			compatible = "fsl,vf610-ftm-pwm";

			#pwm-cells = <3>;

			reg = <0x0 0x29e0000 0x0 0x10000>;

			clock-names = "ftm_sys", "ftm_ext",

				"ftm_fix", "ftm_cnt_clk_en";

			clocks = <&clockgen 4 1>, <&clockgen 4 1>,

				<&clockgen 4 1>, <&clockgen 4 1>;

			big-endian;

			status = "disabled";

		};



		pwm2: pwm@29f0000 {

			compatible = "fsl,vf610-ftm-pwm";

			#pwm-cells = <3>;

			reg = <0x0 0x29f0000 0x0 0x10000>;

			clock-names = "ftm_sys", "ftm_ext",

				"ftm_fix", "ftm_cnt_clk_en";

			clocks = <&clockgen 4 1>, <&clockgen 4 1>,

				<&clockgen 4 1>, <&clockgen 4 1>;

			big-endian;

			status = "disabled";

		};



		pwm3: pwm@2a00000 {

			compatible = "fsl,vf610-ftm-pwm";

			#pwm-cells = <3>;

			reg = <0x0 0x2a00000 0x0 0x10000>;

			clock-names = "ftm_sys", "ftm_ext",

				"ftm_fix", "ftm_cnt_clk_en";

			clocks = <&clockgen 4 1>, <&clockgen 4 1>,

				<&clockgen 4 1>, <&clockgen 4 1>;

			big-endian;

			status = "disabled";

		};



		pwm4: pwm@2a10000 {

			compatible = "fsl,vf610-ftm-pwm";

			#pwm-cells = <3>;

			reg = <0x0 0x2a10000 0x0 0x10000>;

			clock-names = "ftm_sys", "ftm_ext",

				"ftm_fix", "ftm_cnt_clk_en";

			clocks = <&clockgen 4 1>, <&clockgen 4 1>,

				<&clockgen 4 1>, <&clockgen 4 1>;

			big-endian;

			status = "disabled";

		};



		pwm5: pwm@2a20000 {

			compatible = "fsl,vf610-ftm-pwm";

			#pwm-cells = <3>;

			reg = <0x0 0x2a20000 0x0 0x10000>;

			clock-names = "ftm_sys", "ftm_ext",

				"ftm_fix", "ftm_cnt_clk_en";

			clocks = <&clockgen 4 1>, <&clockgen 4 1>,

				<&clockgen 4 1>, <&clockgen 4 1>;

			big-endian;

			status = "disabled";

		};



		pwm6: pwm@2a30000 {

			compatible = "fsl,vf610-ftm-pwm";

			#pwm-cells = <3>;

			reg = <0x0 0x2a30000 0x0 0x10000>;

			clock-names = "ftm_sys", "ftm_ext",

				"ftm_fix", "ftm_cnt_clk_en";

			clocks = <&clockgen 4 1>, <&clockgen 4 1>,

				<&clockgen 4 1>, <&clockgen 4 1>;

			big-endian;

			status = "disabled";

		};



		pwm7: pwm@2a40000 {

			compatible = "fsl,vf610-ftm-pwm";

			#pwm-cells = <3>;

			reg = <0x0 0x2a40000 0x0 0x10000>;

			clock-names = "ftm_sys", "ftm_ext",

				"ftm_fix", "ftm_cnt_clk_en";

			clocks = <&clockgen 4 1>, <&clockgen 4 1>,

				<&clockgen 4 1>, <&clockgen 4 1>;

			big-endian;

			status = "disabled";

		};



		wdog0: watchdog@2ad0000 {

			compatible = "fsl,imx21-wdt";

			reg = <0x0 0x2ad0000 0x0 0x10000>;

CRA Git | Maintained and supported by SUSTech CRA and CCSE