Unverified Commit f80ff131 authored Apr 21, 2020 by Jungseung Lee Committed by Tudor Ambarus Apr 29, 2020

mtd: spi-nor: micron-st: Enable locking for n25q00



n25q00 uses the 4 bit Block Protection scheme and supports Top/Bottom
protection via the BP and TB bits of the Status Register.
Enable locking for n25q00. Tested with cirrus controller.

Signed-off-by: Jungseung Lee <js07.lee@samsung.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>

parent 9f09e37d

drivers/mtd/spi-nor/micron-st.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -61,6 +61,8 @@ static const struct flash_info st_parts[] = {
		SPI_NOR_4BIT_BP \| SPI_NOR_BP3_SR_BIT6) },
		{ "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048,
		SECT_4K \| USE_FSR \| SPI_NOR_QUAD_READ \|
		SPI_NOR_HAS_LOCK \| SPI_NOR_HAS_TB \|
		SPI_NOR_4BIT_BP \| SPI_NOR_BP3_SR_BIT6 \|
		NO_CHIP_ERASE) },
		{ "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048,
		SECT_4K \| USE_FSR \| SPI_NOR_QUAD_READ \|

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