Commit f7d452f4 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-nouveau-next' of... 

Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next

- Various fixes that make surviving concurrent piglit more possible.
- Buffer object deletion no longer synchronous
- Context/register initialisation updates that have been reported to
solve some stability issues (particularly on some problematic GF119
chips)
- Kernel side support for VP2 video decoding engines

* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (44 commits)
  drm/nvd0-/disp: handle case where display engine is missing/disabled
  drm/gr/nvc0-: merge nvc0/nve0 ucode, and use cpp instead of m4
  drm/nouveau/bsp/nv84: initial vp2 engine implementation
  drm/nouveau/vp/nv84: initial vp2 engine implementation
  drm/nouveau/core: xtensa engine base class implementation
  drm/nouveau/vdec: fork vp3 implementations from vp2
  drm/nouveau/core: move falcon class to engine/
  drm/nouveau/kms: don't fail if there's no dcb table entries
  drm/nouveau: remove limit on gart
  drm/nouveau/vm: perform a bar flush when flushing vm
  drm/nvc0/gr: cleanup register lists, and add nvce/nvcf to switches
  drm/nvc8/gr: update initial register/context values
  drm/nvc4/gr: update initial register/context values
  drm/nvc1/gr: update initial register/context values
  drm/nvc3/gr: update initial register/context values
  drm/nvc0/gr: update initial register/context values
  drm/nvd9/gr: update initial register/context values
  drm/nve4/gr: update initial register/context values
  drm/nvc0-/gr: bump maximum gpc/tpc limits
  drm/nvf0/gr: initial register/context setup
  ...
parents c344ee68 791dc143

drivers/gpu/drm/nouveau/Makefile

+17 −1
Original line number Diff line number Diff line
@@ -12,7 +12,6 @@ nouveau-y += core/core/engctx.o 
nouveau-y += core/core/engine.o

nouveau-y += core/core/enum.o

nouveau-y += core/core/event.o

nouveau-y += core/core/falcon.o

nouveau-y += core/core/gpuobj.o

nouveau-y += core/core/handle.o

nouveau-y += core/core/mm.o
@@ -60,6 +59,8 @@ nouveau-y += core/subdev/devinit/nv10.o 
nouveau-y += core/subdev/devinit/nv1a.o

nouveau-y += core/subdev/devinit/nv20.o

nouveau-y += core/subdev/devinit/nv50.o

nouveau-y += core/subdev/devinit/nva3.o

nouveau-y += core/subdev/devinit/nvc0.o

nouveau-y += core/subdev/fb/base.o

nouveau-y += core/subdev/fb/nv04.o

nouveau-y += core/subdev/fb/nv10.o
@@ -78,6 +79,17 @@ nouveau-y += core/subdev/fb/nv49.o 
nouveau-y += core/subdev/fb/nv4e.o

nouveau-y += core/subdev/fb/nv50.o

nouveau-y += core/subdev/fb/nvc0.o

nouveau-y += core/subdev/fb/ramnv04.o

nouveau-y += core/subdev/fb/ramnv10.o

nouveau-y += core/subdev/fb/ramnv1a.o

nouveau-y += core/subdev/fb/ramnv20.o

nouveau-y += core/subdev/fb/ramnv40.o

nouveau-y += core/subdev/fb/ramnv41.o

nouveau-y += core/subdev/fb/ramnv44.o

nouveau-y += core/subdev/fb/ramnv49.o

nouveau-y += core/subdev/fb/ramnv4e.o

nouveau-y += core/subdev/fb/ramnv50.o

nouveau-y += core/subdev/fb/ramnvc0.o

nouveau-y += core/subdev/gpio/base.o

nouveau-y += core/subdev/gpio/nv10.o

nouveau-y += core/subdev/gpio/nv50.o
@@ -129,12 +141,15 @@ nouveau-y += core/subdev/vm/nv44.o 
nouveau-y += core/subdev/vm/nv50.o

nouveau-y += core/subdev/vm/nvc0.o



nouveau-y += core/engine/falcon.o

nouveau-y += core/engine/xtensa.o

nouveau-y += core/engine/dmaobj/base.o

nouveau-y += core/engine/dmaobj/nv04.o

nouveau-y += core/engine/dmaobj/nv50.o

nouveau-y += core/engine/dmaobj/nvc0.o

nouveau-y += core/engine/dmaobj/nvd0.o

nouveau-y += core/engine/bsp/nv84.o

nouveau-y += core/engine/bsp/nv98.o

nouveau-y += core/engine/bsp/nvc0.o

nouveau-y += core/engine/bsp/nve0.o

nouveau-y += core/engine/copy/nva3.o
@@ -209,6 +224,7 @@ nouveau-y += core/engine/software/nv10.o 
nouveau-y += core/engine/software/nv50.o

nouveau-y += core/engine/software/nvc0.o

nouveau-y += core/engine/vp/nv84.o

nouveau-y += core/engine/vp/nv98.o

nouveau-y += core/engine/vp/nvc0.o

nouveau-y += core/engine/vp/nve0.o

drivers/gpu/drm/nouveau/core/core/mm.c

+0 −1
Original line number Diff line number Diff line
@@ -208,7 +208,6 @@ nouveau_mm_init(struct nouveau_mm *mm, u32 offset, u32 length, u32 block) 
	struct nouveau_mm_node *node;



	if (block) {

		mutex_init(&mm->mutex);

		INIT_LIST_HEAD(&mm->nodes);

		INIT_LIST_HEAD(&mm->free);

		mm->block_size = block;

drivers/gpu/drm/nouveau/core/engine/bsp/nv84.c

+13 −14
Original line number Diff line number Diff line
@@ -19,24 +19,19 @@ 
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 * Authors: Ben Skeggs

 * Authors: Ben Skeggs, Ilia Mirkin

 */



#include <core/engctx.h>

#include <core/class.h>



#include <engine/xtensa.h>

#include <engine/bsp.h>



struct nv84_bsp_priv {

	struct nouveau_engine base;

};



/*******************************************************************************

 * BSP object classes

 ******************************************************************************/



static struct nouveau_oclass

nv84_bsp_sclass[] = {

	{ 0x74b0, &nouveau_object_ofuncs },

	{},

};
@@ -48,7 +43,7 @@ static struct nouveau_oclass 
nv84_bsp_cclass = {

	.handle = NV_ENGCTX(BSP, 0x84),

	.ofuncs = &(struct nouveau_ofuncs) {

		.ctor = _nouveau_engctx_ctor,

		.ctor = _nouveau_xtensa_engctx_ctor,

		.dtor = _nouveau_engctx_dtor,

		.init = _nouveau_engctx_init,

		.fini = _nouveau_engctx_fini,
@@ -66,10 +61,10 @@ nv84_bsp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	      struct nouveau_oclass *oclass, void *data, u32 size,

	      struct nouveau_object **pobject)

{

	struct nv84_bsp_priv *priv;

	struct nouveau_xtensa *priv;

	int ret;



	ret = nouveau_engine_create(parent, engine, oclass, true,

	ret = nouveau_xtensa_create(parent, engine, oclass, 0x103000, true,

				    "PBSP", "bsp", &priv);

	*pobject = nv_object(priv);

	if (ret)
@@ -78,6 +73,8 @@ nv84_bsp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	nv_subdev(priv)->unit = 0x04008000;

	nv_engine(priv)->cclass = &nv84_bsp_cclass;

	nv_engine(priv)->sclass = nv84_bsp_sclass;

	priv->fifo_val = 0x1111;

	priv->unkd28 = 0x90044;

	return 0;

}
@@ -86,8 +83,10 @@ nv84_bsp_oclass = { 
	.handle = NV_ENGINE(BSP, 0x84),

	.ofuncs = &(struct nouveau_ofuncs) {

		.ctor = nv84_bsp_ctor,

		.dtor = _nouveau_engine_dtor,

		.init = _nouveau_engine_init,

		.fini = _nouveau_engine_fini,

		.dtor = _nouveau_xtensa_dtor,

		.init = _nouveau_xtensa_init,

		.fini = _nouveau_xtensa_fini,

		.rd32 = _nouveau_xtensa_rd32,

		.wr32 = _nouveau_xtensa_wr32,

	},

};

drivers/gpu/drm/nouveau/core/engine/bsp/nv98.c

0 → 100644
+93 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2012 Red Hat Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 * Authors: Ben Skeggs

 */



#include <core/engctx.h>

#include <core/class.h>



#include <engine/bsp.h>



struct nv98_bsp_priv {

	struct nouveau_engine base;

};



/*******************************************************************************

 * BSP object classes

 ******************************************************************************/



static struct nouveau_oclass

nv98_bsp_sclass[] = {

	{},

};



/*******************************************************************************

 * BSP context

 ******************************************************************************/



static struct nouveau_oclass

nv98_bsp_cclass = {

	.handle = NV_ENGCTX(BSP, 0x98),

	.ofuncs = &(struct nouveau_ofuncs) {

		.ctor = _nouveau_engctx_ctor,

		.dtor = _nouveau_engctx_dtor,

		.init = _nouveau_engctx_init,

		.fini = _nouveau_engctx_fini,

		.rd32 = _nouveau_engctx_rd32,

		.wr32 = _nouveau_engctx_wr32,

	},

};



/*******************************************************************************

 * BSP engine/subdev functions

 ******************************************************************************/



static int

nv98_bsp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,

	      struct nouveau_oclass *oclass, void *data, u32 size,

	      struct nouveau_object **pobject)

{

	struct nv98_bsp_priv *priv;

	int ret;



	ret = nouveau_engine_create(parent, engine, oclass, true,

				    "PBSP", "bsp", &priv);

	*pobject = nv_object(priv);

	if (ret)

		return ret;



	nv_subdev(priv)->unit = 0x04008000;

	nv_engine(priv)->cclass = &nv98_bsp_cclass;

	nv_engine(priv)->sclass = nv98_bsp_sclass;

	return 0;

}



struct nouveau_oclass

nv98_bsp_oclass = {

	.handle = NV_ENGINE(BSP, 0x98),

	.ofuncs = &(struct nouveau_ofuncs) {

		.ctor = nv98_bsp_ctor,

		.dtor = _nouveau_engine_dtor,

		.init = _nouveau_engine_init,

		.fini = _nouveau_engine_fini,

	},

};

drivers/gpu/drm/nouveau/core/engine/bsp/nvc0.c

+1 −2
Original line number Diff line number Diff line
@@ -22,8 +22,7 @@ 
 * Authors: Maarten Lankhorst

 */



#include <core/falcon.h>



#include <engine/falcon.h>

#include <engine/bsp.h>



struct nvc0_bsp_priv {

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