MIPS: Remove usage of CEVT_R4K_LIB config option. (f772cdb2) · Commits · 戴 / test

Manuel Lauss <manuel.lauss@gmail.com> writes: I introduced it as a fallback because early revisions of Alchemy hardware we shipped had a non-functional 32kHz timer and had to rely on the r4k timer instead. Previously the r4k timer was initialized regardless, but it's useless with the "wait" instruction. So long story short: I need either the on-chip 32kHz timer OR the r4k timer if the 32kHz one is unusable, but not both, and r4k timer is useless when au1k_idle is in use. The current in-kernel Alchemy boards all work with the 32kHz timer, so I'm not against removing R4K_LIB symbols. Signed-off-by:

Ralf Baechle <ralf@linux-mips.org>

arch/mips/Kconfig

+1 −5

Original line number	Diff line number	Diff line
		@@ -54,7 +54,7 @@ choice
		config MIPS_ALCHEMY
		bool "Alchemy processor based machines"
		select 64BIT_PHYS_ADDR
		select CEVT_R4K_LIB
		select CEVT_R4K
		select CSRC_R4K
		select IRQ_CPU
		select SYS_HAS_CPU_MIPS32_R1
		@@ -926,11 +926,7 @@ config CEVT_DS1287
		config CEVT_GT641XX
		bool

		config CEVT_R4K_LIB
		bool

		config CEVT_R4K
		select CEVT_R4K_LIB
		bool

		config CEVT_SB1250

arch/mips/include/asm/time.h

+0 −2

Original line number	Diff line number	Diff line
		@@ -50,10 +50,8 @@ extern int (*perf_irq)(void);
		/*
		* Initialize the calling CPU's compare interrupt as clockevent device
		*/
		#ifdef CONFIG_CEVT_R4K_LIB
		extern unsigned int __weak get_c0_compare_int(void);
		extern int r4k_clockevent_init(void);
		#endif

		static inline int mips_clockevent_init(void)
		{

arch/mips/kernel/Makefile

+1 −1

Original line number	Diff line number	Diff line
		@@ -16,7 +16,7 @@ CFLAGS_REMOVE_perf_event_mipsxx.o = -pg
		endif

		obj-$(CONFIG_CEVT_BCM1480) += cevt-bcm1480.o
		obj-$(CONFIG_CEVT_R4K_LIB) += cevt-r4k.o
		obj-$(CONFIG_CEVT_R4K) += cevt-r4k.o
		obj-$(CONFIG_MIPS_MT_SMTC) += cevt-smtc.o
		obj-$(CONFIG_CEVT_DS1287) += cevt-ds1287.o
		obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o

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