Commit f75e2294 authored by Marc Zyngier's avatar Marc Zyngier
Browse files

arm64: Add ARM64_WORKAROUND_1319367 for all A57 and A72 versions 



Rework the EL2 vector hardening that is only selected for A57 and A72
so that the table can also be used for ARM64_WORKAROUND_1319367.

Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Reviewed-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent 4f5cafb5

arch/arm64/include/asm/cpucaps.h

+2 −1
Original line number Diff line number Diff line
@@ -52,7 +52,8 @@ 
#define ARM64_HAS_IRQ_PRIO_MASKING		42

#define ARM64_HAS_DCPODP			43

#define ARM64_WORKAROUND_1463225		44

#define ARM64_WORKAROUND_1319367		45



#define ARM64_NCAPS				45

#define ARM64_NCAPS				46



#endif /* __ASM_CPUCAPS_H */

arch/arm64/kernel/cpu_errata.c

+10 −3
Original line number Diff line number Diff line
@@ -623,9 +623,9 @@ check_branch_predictor(const struct arm64_cpu_capabilities *entry, int scope) 
	return (need_wa > 0);

}



#ifdef CONFIG_HARDEN_EL2_VECTORS

#if defined(CONFIG_HARDEN_EL2_VECTORS) || defined(CONFIG_ARM64_ERRATUM_1319367)



static const struct midr_range arm64_harden_el2_vectors[] = {

static const struct midr_range ca57_a72[] = {

	MIDR_ALL_VERSIONS(MIDR_CORTEX_A57),

	MIDR_ALL_VERSIONS(MIDR_CORTEX_A72),

	{},
@@ -819,7 +819,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = { 
	{

		.desc = "EL2 vector hardening",

		.capability = ARM64_HARDEN_EL2_VECTORS,

		ERRATA_MIDR_RANGE_LIST(arm64_harden_el2_vectors),

		ERRATA_MIDR_RANGE_LIST(ca57_a72),

	},

#endif

	{
@@ -851,6 +851,13 @@ const struct arm64_cpu_capabilities arm64_errata[] = { 
		.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,

		.matches = has_cortex_a76_erratum_1463225,

	},

#endif

#ifdef CONFIG_ARM64_ERRATUM_1319367

	{

		.desc = "ARM erratum 1319367",

		.capability = ARM64_WORKAROUND_1319367,

		ERRATA_MIDR_RANGE_LIST(ca57_a72),

	},

#endif

	{

	}

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