Commit f72f4f1a authored by Jonathan Marek's avatar Jonathan Marek Committed by Rob Clark
Browse files

drm/msm/mdp4: add lcdc-align-lsb flag to control lane alignment



This allows controlling which of the 8 lanes are used for 6 bit color.

Signed-off-by: default avatarJonathan Marek <jonathan@marek.ca>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent c2052a4e
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+2 −0
Original line number Diff line number Diff line
@@ -38,6 +38,8 @@ Required properties:
Optional properties:
- clock-names: the following clocks are optional:
  * "lut_clk"
- qcom,lcdc-align-lsb: Boolean value indicating that LSB alignment should be
  used for LCDC. This is only valid for 18bpp panels.

Example:

+13 −8
Original line number Diff line number Diff line
@@ -377,20 +377,25 @@ static void mdp4_lcdc_encoder_enable(struct drm_encoder *encoder)
	unsigned long pc = mdp4_lcdc_encoder->pixclock;
	struct mdp4_kms *mdp4_kms = get_kms(encoder);
	struct drm_panel *panel;
	uint32_t config;
	int i, ret;

	if (WARN_ON(mdp4_lcdc_encoder->enabled))
		return;

	/* TODO: hard-coded for 18bpp: */
	mdp4_crtc_set_config(encoder->crtc,
	config =
		MDP4_DMA_CONFIG_R_BPC(BPC6) |
		MDP4_DMA_CONFIG_G_BPC(BPC6) |
		MDP4_DMA_CONFIG_B_BPC(BPC6) |
			MDP4_DMA_CONFIG_PACK_ALIGN_MSB |
		MDP4_DMA_CONFIG_PACK(0x21) |
		MDP4_DMA_CONFIG_DEFLKR_EN |
			MDP4_DMA_CONFIG_DITHER_EN);
		MDP4_DMA_CONFIG_DITHER_EN;

	if (!of_property_read_bool(dev->dev->of_node, "qcom,lcdc-align-lsb"))
		config |= MDP4_DMA_CONFIG_PACK_ALIGN_MSB;

	mdp4_crtc_set_config(encoder->crtc, config);
	mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 0);

	bs_set(mdp4_lcdc_encoder, 1);