Commit f7257a22 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-next-3.17' of git://people.freedesktop.org/~agd5f/linux into drm-next

- Additional Hawaii fixes
- Support for using the display scaler on non-fixed mode displays
- Support for new firmware format that makes it easier to update
- Enable dpm by default on additional asics
- GPUVM improvements
- Support for uncached and write combined gtt buffers
- Allow allocation of BOs larger than visible vram
- Various other small fixes and improvements

* 'drm-next-3.17' of git://people.freedesktop.org/~agd5f/linux: (57 commits)
  drm/radeon: Prevent hdmi deep color if max_tmds_clock is undefined.
  drm/radeon: Use pflip irqs for pageflip completion if possible. (v2)
  drm/radeon: tweak ACCEL_WORKING2 query for the new firmware for hawaii
  drm/radeon: use packet3 for nop on hawaii with new firmware
  drm/radeon: tweak ACCEL_WORKING2 query for hawaii
  drm/radeon: use packet2 for nop on hawaii with old firmware
  drm/radeon: update IB size estimation for VM
  drm/radeon: split PT setup in more functions
  drm/radeon: add VM GART copy optimization to NI as well
  drm/radeon: take a BO reference on VM cleanup
  drm/radeon: add radeon_bo_ref function
  drm/radeon: remove taking mclk_lock from radeon_bo_unref
  drm/radeon: adjust default radeon_vm_block_size v2
  drm/radeon: try to enable VM flushing once more
  drm/radeon: use an intervall tree to manage the VMA v2
  drm/radeon: remove radeon_bo_clear_va
  drm/radeon: invalidate moved BOs in the VM (v2)
  drm/radeon: re-enable dpm by default on BTC
  drm/radeon: re-enable dpm by default on cayman
  drm/radeon: Only flush HDP cache from idle ioctl if BO is in VRAM
  ...
parents 168c02ec 9f51e2e0
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+1 −0
Original line number Original line Diff line number Diff line
@@ -114,6 +114,7 @@ config DRM_RADEON
	select POWER_SUPPLY
	select POWER_SUPPLY
	select HWMON
	select HWMON
	select BACKLIGHT_CLASS_DEVICE
	select BACKLIGHT_CLASS_DEVICE
	select INTERVAL_TREE
	help
	help
	  Choose this option if you have an ATI Radeon graphics card.  There
	  Choose this option if you have an ATI Radeon graphics card.  There
	  are both PCI and AGP versions.  You don't need to choose this to
	  are both PCI and AGP versions.  You don't need to choose this to
+1 −1
Original line number Original line Diff line number Diff line
@@ -80,7 +80,7 @@ radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \
	r600_dpm.o rs780_dpm.o rv6xx_dpm.o rv770_dpm.o rv730_dpm.o rv740_dpm.o \
	r600_dpm.o rs780_dpm.o rv6xx_dpm.o rv770_dpm.o rv730_dpm.o rv740_dpm.o \
	rv770_smc.o cypress_dpm.o btc_dpm.o sumo_dpm.o sumo_smc.o trinity_dpm.o \
	rv770_smc.o cypress_dpm.o btc_dpm.o sumo_dpm.o sumo_smc.o trinity_dpm.o \
	trinity_smc.o ni_dpm.o si_smc.o si_dpm.o kv_smc.o kv_dpm.o ci_smc.o \
	trinity_smc.o ni_dpm.o si_smc.o si_dpm.o kv_smc.o kv_dpm.o ci_smc.o \
	ci_dpm.o dce6_afmt.o radeon_vm.o
	ci_dpm.o dce6_afmt.o radeon_vm.o radeon_ucode.o radeon_ib.o


# add async DMA block
# add async DMA block
radeon-y += \
radeon-y += \
+8 −8
Original line number Original line Diff line number Diff line
@@ -331,12 +331,10 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder,
	    && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2)))
	    && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2)))
		adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2;
		adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2;


	/* get the native mode for LVDS */
	/* get the native mode for scaling */
	if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT))
	if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT)) {
		radeon_panel_mode_fixup(encoder, adjusted_mode);
		radeon_panel_mode_fixup(encoder, adjusted_mode);

	} else if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
	/* get the native mode for TV */
	if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
		struct radeon_encoder_atom_dac *tv_dac = radeon_encoder->enc_priv;
		struct radeon_encoder_atom_dac *tv_dac = radeon_encoder->enc_priv;
		if (tv_dac) {
		if (tv_dac) {
			if (tv_dac->tv_std == TV_STD_NTSC ||
			if (tv_dac->tv_std == TV_STD_NTSC ||
@@ -346,6 +344,8 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder,
			else
			else
				radeon_atom_get_tv_timings(rdev, 1, adjusted_mode);
				radeon_atom_get_tv_timings(rdev, 1, adjusted_mode);
		}
		}
	} else if (radeon_encoder->rmx_type != RMX_OFF) {
		radeon_panel_mode_fixup(encoder, adjusted_mode);
	}
	}


	if (ASIC_IS_DCE3(rdev) &&
	if (ASIC_IS_DCE3(rdev) &&
@@ -716,7 +716,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
			if (radeon_connector->use_digital &&
			if (radeon_connector->use_digital &&
			    (radeon_connector->audio == RADEON_AUDIO_ENABLE))
			    (radeon_connector->audio == RADEON_AUDIO_ENABLE))
				return ATOM_ENCODER_MODE_HDMI;
				return ATOM_ENCODER_MODE_HDMI;
			else if (drm_detect_hdmi_monitor(radeon_connector->edid) &&
			else if (drm_detect_hdmi_monitor(radeon_connector_edid(connector)) &&
				 (radeon_connector->audio == RADEON_AUDIO_AUTO))
				 (radeon_connector->audio == RADEON_AUDIO_AUTO))
				return ATOM_ENCODER_MODE_HDMI;
				return ATOM_ENCODER_MODE_HDMI;
			else if (radeon_connector->use_digital)
			else if (radeon_connector->use_digital)
@@ -735,7 +735,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
		if (radeon_audio != 0) {
		if (radeon_audio != 0) {
			if (radeon_connector->audio == RADEON_AUDIO_ENABLE)
			if (radeon_connector->audio == RADEON_AUDIO_ENABLE)
				return ATOM_ENCODER_MODE_HDMI;
				return ATOM_ENCODER_MODE_HDMI;
			else if (drm_detect_hdmi_monitor(radeon_connector->edid) &&
			else if (drm_detect_hdmi_monitor(radeon_connector_edid(connector)) &&
				 (radeon_connector->audio == RADEON_AUDIO_AUTO))
				 (radeon_connector->audio == RADEON_AUDIO_AUTO))
				return ATOM_ENCODER_MODE_HDMI;
				return ATOM_ENCODER_MODE_HDMI;
			else
			else
@@ -755,7 +755,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
		} else if (radeon_audio != 0) {
		} else if (radeon_audio != 0) {
			if (radeon_connector->audio == RADEON_AUDIO_ENABLE)
			if (radeon_connector->audio == RADEON_AUDIO_ENABLE)
				return ATOM_ENCODER_MODE_HDMI;
				return ATOM_ENCODER_MODE_HDMI;
			else if (drm_detect_hdmi_monitor(radeon_connector->edid) &&
			else if (drm_detect_hdmi_monitor(radeon_connector_edid(connector)) &&
				 (radeon_connector->audio == RADEON_AUDIO_AUTO))
				 (radeon_connector->audio == RADEON_AUDIO_AUTO))
				return ATOM_ENCODER_MODE_HDMI;
				return ATOM_ENCODER_MODE_HDMI;
			else
			else
+12 −1
Original line number Original line Diff line number Diff line
@@ -940,7 +940,18 @@ static void ci_get_leakage_voltages(struct radeon_device *rdev)
	pi->vddc_leakage.count = 0;
	pi->vddc_leakage.count = 0;
	pi->vddci_leakage.count = 0;
	pi->vddci_leakage.count = 0;


	if (radeon_atom_get_leakage_id_from_vbios(rdev, &leakage_id) == 0) {
	if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) {
		for (i = 0; i < CISLANDS_MAX_LEAKAGE_COUNT; i++) {
			virtual_voltage_id = ATOM_VIRTUAL_VOLTAGE_ID0 + i;
			if (radeon_atom_get_voltage_evv(rdev, virtual_voltage_id, &vddc) != 0)
				continue;
			if (vddc != 0 && vddc != virtual_voltage_id) {
				pi->vddc_leakage.actual_voltage[pi->vddc_leakage.count] = vddc;
				pi->vddc_leakage.leakage_id[pi->vddc_leakage.count] = virtual_voltage_id;
				pi->vddc_leakage.count++;
			}
		}
	} else if (radeon_atom_get_leakage_id_from_vbios(rdev, &leakage_id) == 0) {
		for (i = 0; i < CISLANDS_MAX_LEAKAGE_COUNT; i++) {
		for (i = 0; i < CISLANDS_MAX_LEAKAGE_COUNT; i++) {
			virtual_voltage_id = ATOM_VIRTUAL_VOLTAGE_ID0 + i;
			virtual_voltage_id = ATOM_VIRTUAL_VOLTAGE_ID0 + i;
			if (radeon_atom_get_leakage_vddc_based_on_leakage_params(rdev, &vddc, &vddci,
			if (radeon_atom_get_leakage_vddc_based_on_leakage_params(rdev, &vddc, &vddci,
+26 −13
Original line number Original line Diff line number Diff line
@@ -213,6 +213,17 @@ int ci_load_smc_ucode(struct radeon_device *rdev, u32 limit)
	if (!rdev->smc_fw)
	if (!rdev->smc_fw)
		return -EINVAL;
		return -EINVAL;


	if (rdev->new_fw) {
		const struct smc_firmware_header_v1_0 *hdr =
			(const struct smc_firmware_header_v1_0 *)rdev->smc_fw->data;

		radeon_ucode_print_smc_hdr(&hdr->header);

		ucode_start_address = le32_to_cpu(hdr->ucode_start_addr);
		ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes);
		src = (const u8 *)
			(rdev->smc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));
	} else {
		switch (rdev->family) {
		switch (rdev->family) {
		case CHIP_BONAIRE:
		case CHIP_BONAIRE:
			ucode_start_address = BONAIRE_SMC_UCODE_START;
			ucode_start_address = BONAIRE_SMC_UCODE_START;
@@ -227,10 +238,12 @@ int ci_load_smc_ucode(struct radeon_device *rdev, u32 limit)
			BUG();
			BUG();
		}
		}


		src = (const u8 *)rdev->smc_fw->data;
	}

	if (ucode_size & 3)
	if (ucode_size & 3)
		return -EINVAL;
		return -EINVAL;


	src = (const u8 *)rdev->smc_fw->data;
	spin_lock_irqsave(&rdev->smc_idx_lock, flags);
	spin_lock_irqsave(&rdev->smc_idx_lock, flags);
	WREG32(SMC_IND_INDEX_0, ucode_start_address);
	WREG32(SMC_IND_INDEX_0, ucode_start_address);
	WREG32_P(SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, ~AUTO_INCREMENT_IND_0);
	WREG32_P(SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, ~AUTO_INCREMENT_IND_0);
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