ARM: mvebu: Allow to power down L2 cache controller in idle mode (f713c7e7) · Commits · 戴 / test

This commit adds a function which adjusts the PMSU configuration to automatically power down the L2 and coherency fabric when we enter a certain idle state. This feature is part of the Power Management Service Unit of the Armada 370 and Armada XP SoCs. Signed-off-by:

Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1397488214-20685-8-git-send-email-gregory.clement@free-electrons.com Signed-off-by:

Jason Cooper <jason@lakedaemon.net>

arch/arm/mach-mvebu/pmsu.c

+19 −1

Original line number	Diff line number	Diff line
		@@ -33,8 +33,13 @@ static void __iomem *pmsu_mp_base;
		#define PMSU_BASE_OFFSET 0x100
		#define PMSU_REG_SIZE 0x1000

		/* PMSU MP registers */
		#define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x124)

		/* PMSU fabric registers */
		#define L2C_NFABRIC_PM_CTL 0x4
		#define L2C_NFABRIC_PM_CTL_PWR_DOWN BIT(20)

		static struct of_device_id of_pmsu_table[] = {
		{ .compatible = "marvell,armada-370-pmsu", },
		{ .compatible = "marvell,armada-370-xp-pmsu", },
		@@ -92,4 +97,17 @@ static int __init armada_370_xp_pmsu_init(void)
		return ret;
		}

		static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void)
		{
		u32 reg;

		if (pmsu_mp_base == NULL)
		return;

		/* Enable L2 & Fabric powerdown in Deep-Idle mode - Fabric */
		reg = readl(pmsu_mp_base + L2C_NFABRIC_PM_CTL);
		reg \|= L2C_NFABRIC_PM_CTL_PWR_DOWN;
		writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL);
		}

		early_initcall(armada_370_xp_pmsu_init);

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