Commit f6f7d6b5 authored by Maor Gottlieb's avatar Maor Gottlieb Committed by Saeed Mahameed
Browse files

net/mlx5: Add new miss flow table action 



Flow table supports three types of miss action:
1. Default miss action - go to default miss table according to table.
2. Go to specific table.
3. Switch domain - go to the root table of an alternative steering
   table domain.

New table miss action was added - switch_domain.
The next domain for RDMA_RX namespace is the NIC RX domain.

Signed-off-by: default avatarMaor Gottlieb <maorg@mellanox.com>
Reviewed-by: default avatarMark Bloch <markb@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
parent d83eb50e

drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c

+10 −3
Original line number Diff line number Diff line
@@ -172,9 +172,14 @@ static int mlx5_cmd_create_flow_table(struct mlx5_flow_root_namespace *ns, 
	case FS_FT_OP_MOD_NORMAL:

		if (next_ft) {

			MLX5_SET(create_flow_table_in, in,

				 flow_table_context.table_miss_action, 1);

				 flow_table_context.table_miss_action,

				 MLX5_FLOW_TABLE_MISS_ACTION_FWD);

			MLX5_SET(create_flow_table_in, in,

				 flow_table_context.table_miss_id, next_ft->id);

		} else {

			MLX5_SET(create_flow_table_in, in,

				 flow_table_context.table_miss_action,

				 ns->def_miss_action);

		}

		break;
@@ -246,13 +251,15 @@ static int mlx5_cmd_modify_flow_table(struct mlx5_flow_root_namespace *ns, 
			 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID);

		if (next_ft) {

			MLX5_SET(modify_flow_table_in, in,

				 flow_table_context.table_miss_action, 1);

				 flow_table_context.table_miss_action,

				 MLX5_FLOW_TABLE_MISS_ACTION_FWD);

			MLX5_SET(modify_flow_table_in, in,

				 flow_table_context.table_miss_id,

				 next_ft->id);

		} else {

			MLX5_SET(modify_flow_table_in, in,

				 flow_table_context.table_miss_action, 0);

				 flow_table_context.table_miss_action,

				 ns->def_miss_action);

		}

	}

drivers/net/ethernet/mellanox/mlx5/core/fs_core.c

+5 −1
Original line number Diff line number Diff line
@@ -2504,6 +2504,9 @@ static int init_rdma_rx_root_ns(struct mlx5_flow_steering *steering) 
	if (!steering->rdma_rx_root_ns)

		return -ENOMEM;



	steering->rdma_rx_root_ns->def_miss_action =

		MLX5_FLOW_TABLE_MISS_ACTION_SWITCH_DOMAIN;



	/* Create single prio */

	prio = fs_create_prio(&steering->rdma_rx_root_ns->ns, 0, 1);

	if (IS_ERR(prio)) {
@@ -2748,7 +2751,8 @@ int mlx5_init_fs(struct mlx5_core_dev *dev) 
			goto err;

	}



	if (MLX5_CAP_FLOWTABLE_RDMA_RX(dev, ft_support)) {

	if (MLX5_CAP_FLOWTABLE_RDMA_RX(dev, ft_support) &&

	    MLX5_CAP_FLOWTABLE_RDMA_RX(dev, table_miss_action_domain)) {

		err = init_rdma_rx_root_ns(steering);

		if (err)

			goto err;

drivers/net/ethernet/mellanox/mlx5/core/fs_core.h

+1 −0
Original line number Diff line number Diff line
@@ -218,6 +218,7 @@ struct mlx5_flow_root_namespace { 
	struct mutex			chain_lock;

	struct list_head		underlay_qpns;

	const struct mlx5_flow_cmds	*cmds;

	enum mlx5_flow_table_miss_action def_miss_action;

};



int mlx5_init_fc_stats(struct mlx5_core_dev *dev);

include/linux/mlx5/mlx5_ifc.h

+9 −1
Original line number Diff line number Diff line
@@ -370,7 +370,9 @@ struct mlx5_ifc_flow_table_prop_layout_bits { 
	u8	   reformat_l3_tunnel_to_l2[0x1];

	u8	   reformat_l2_to_l3_tunnel[0x1];

	u8	   reformat_and_modify_action[0x1];

	u8         reserved_at_15[0xb];

	u8         reserved_at_15[0x2];

	u8	   table_miss_action_domain[0x1];

	u8         reserved_at_18[0x8];

	u8         reserved_at_20[0x2];

	u8         log_max_ft_size[0x6];

	u8         log_max_modify_header_context[0x8];
@@ -1284,6 +1286,12 @@ enum mlx5_flow_destination_type { 
	MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE_NUM = 0x101,

};



enum mlx5_flow_table_miss_action {

	MLX5_FLOW_TABLE_MISS_ACTION_DEF,

	MLX5_FLOW_TABLE_MISS_ACTION_FWD,

	MLX5_FLOW_TABLE_MISS_ACTION_SWITCH_DOMAIN,

};



struct mlx5_ifc_dest_format_struct_bits {

	u8         destination_type[0x8];

	u8         destination_id[0x18];

CRA Git | Maintained and supported by SUSTech CRA and CCSE