Commit f6cbe49b authored Dec 04, 2020 by Manasi Navare Committed by Rodrigo Vivi Dec 08, 2020

drm/i915/display/dp: Compute the correct slice count for VDSC on DP



This patch fixes the slice count computation algorithm
for calculating the slice count based on Peak pixel rate
and the max slice width allowed on the DSC engines.
We need to ensure slice count > min slice count req
as per DP spec based on peak pixel rate and that it is
greater than min slice count based on the max slice width
advertised by DPCD. So use max of these two.
In the prev patch we were using min of these 2 causing it
to violate the max slice width limitation causing a blank
screen on 8K@60.

Fixes: d9218c8f ("drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC")
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: <stable@vger.kernel.org> # v5.0+
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201204205804.25225-1-manasi.d.navare@intel.com


(cherry picked from commit d371d6ea92ad2a47f42bbcaa786ee5f6069c9c14)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

parent 88c52d80

drivers/gpu/drm/i915/display/intel_dp.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -573,7 +573,7 @@ static u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,
		return 0;
		}
		/* Also take into account max slice width */
		min_slice_count = min_t(u8, min_slice_count,
		min_slice_count = max_t(u8, min_slice_count,
		DIV_ROUND_UP(mode_hdisplay,
		max_slice_width));

Admin message