ASoC: sun4i-spdif: Add TX fifo bit flush quirks

 *

 * @reg_dac_tx_data: TX FIFO offset for DMA config.

 * @has_reset: SoC needs reset deasserted.

 * @val_fctl_ftx: TX FIFO flush bitmask.

 */

struct sun4i_spdif_quirks {

	unsigned int reg_dac_txdata;

	bool has_reset;

	unsigned int val_fctl_ftx;

};

struct sun4i_spdif_dev {

	struct snd_soc_dai_driver cpu_dai_drv;

	struct regmap *regmap;

	struct snd_dmaengine_dai_dma_data dma_params_tx;

	const struct sun4i_spdif_quirks *quirks;

};

static void sun4i_spdif_configure(struct sun4i_spdif_dev *host)

{

	const struct sun4i_spdif_quirks *quirks = host->quirks;

	/* soft reset SPDIF */

	regmap_write(host->regmap, SUN4I_SPDIF_CTL, SUN4I_SPDIF_CTL_RESET);

	/* flush TX FIFO */

	regmap_update_bits(host->regmap, SUN4I_SPDIF_FCTL,

			   SUN4I_SPDIF_FCTL_FTX, SUN4I_SPDIF_FCTL_FTX);

			   quirks->val_fctl_ftx, quirks->val_fctl_ftx);

	/* clear TX counter */

	regmap_write(host->regmap, SUN4I_SPDIF_TXCNT, 0);

static const struct sun4i_spdif_quirks sun4i_a10_spdif_quirks = {

	.reg_dac_txdata	= SUN4I_SPDIF_TXFIFO,

	.val_fctl_ftx   = SUN4I_SPDIF_FCTL_FTX,

};

static const struct sun4i_spdif_quirks sun6i_a31_spdif_quirks = {

	.reg_dac_txdata	= SUN4I_SPDIF_TXFIFO,

	.val_fctl_ftx   = SUN4I_SPDIF_FCTL_FTX,

	.has_reset	= true,

};

static const struct sun4i_spdif_quirks sun8i_h3_spdif_quirks = {

	.reg_dac_txdata	= SUN8I_SPDIF_TXFIFO,

	.val_fctl_ftx   = SUN4I_SPDIF_FCTL_FTX,

	.has_reset	= true,

};

		dev_err(&pdev->dev, "Failed to determine the quirks to use\n");

		return -ENODEV;

	}

	host->quirks = quirks;

	host->regmap = devm_regmap_init_mmio(&pdev->dev, base,

						&sun4i_spdif_regmap_config);