Commit f669e74b authored by Pratyush Yadav's avatar Pratyush Yadav Committed by Richard Weinberger
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ubi: Do not zero out EC and VID on ECC-ed NOR flashes



For NOR flashes EC and VID are zeroed out before an erase is issued to
make sure UBI does not mistakenly treat the PEB as used and associate it
with an LEB.

But on some flashes, like the Cypress Semper S28 SPI NOR flash family,
multi-pass page programming is not allowed on the default ECC scheme.
This means zeroing out these magic numbers will result in the flash
throwing a page programming error.

Do not zero out EC and VID for such flashes. A writesize > 1 is an
indication of an ECC-ed flash.

Signed-off-by: default avatarPratyush Yadav <p.yadav@ti.com>
Reviewed-by: default avatarTudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: default avatarRichard Weinberger <richard@nod.at>
parent 22bdb8b6
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+1 −3
Original line number Diff line number Diff line
@@ -628,10 +628,8 @@ static int io_init(struct ubi_device *ubi, int max_beb_per1024)
		ubi->bad_peb_limit = get_bad_peb_limit(ubi, max_beb_per1024);
	}

	if (ubi->mtd->type == MTD_NORFLASH) {
		ubi_assert(ubi->mtd->writesize == 1);
	if (ubi->mtd->type == MTD_NORFLASH)
		ubi->nor_flash = 1;
	}

	ubi->min_io_size = ubi->mtd->writesize;
	ubi->hdrs_min_io_size = ubi->mtd->writesize >> ubi->mtd->subpage_sft;
+8 −1
Original line number Diff line number Diff line
@@ -535,7 +535,14 @@ int ubi_io_sync_erase(struct ubi_device *ubi, int pnum, int torture)
		return -EROFS;
	}

	if (ubi->nor_flash) {
	/*
	 * If the flash is ECC-ed then we have to erase the ECC block before we
	 * can write to it. But the write is in preparation to an erase in the
	 * first place. This means we cannot zero out EC and VID before the
	 * erase and we just have to hope the flash starts erasing from the
	 * start of the page.
	 */
	if (ubi->nor_flash && ubi->mtd->writesize == 1) {
		err = nor_erase_prepare(ubi, pnum);
		if (err)
			return err;