Commit f63d8906 authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher
Browse files

drm/amd/display: change dml numdpp var to uint 



Signed-off-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e92b44fd

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c

+7 −7
Original line number Diff line number Diff line
@@ -1158,7 +1158,7 @@ static bool CalculatePrefetchSchedule( 
		else if (PageTableLevels == 3)

			*Tno_bw = UrgentExtraLatency;

		else

			Tno_bw = 0;

			*Tno_bw = 0;

	} else if (DCCEnable)

		*Tno_bw = LineTime;

	else
@@ -4721,14 +4721,14 @@ static void ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_ 
					&& mode_lib->vba.SwathWidthYSingleDPP[k]

							<= mode_lib->vba.MaximumSwathWidth[k]

					&& mode_lib->vba.ODMCombineEnablePerState[i][k] == false) {

				mode_lib->vba.NoOfDPP[i][k] = 1.0;

				mode_lib->vba.NoOfDPP[i][k] = 1;

				mode_lib->vba.RequiredDPPCLK[i][k] =

						mode_lib->vba.MinDPPCLKUsingSingleDPP[k]

								* (1.0

										+ mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading

												/ 100.0);

			} else {

				mode_lib->vba.NoOfDPP[i][k] = 2.0;

				mode_lib->vba.NoOfDPP[i][k] = 2;

				mode_lib->vba.RequiredDPPCLK[i][k] =

						mode_lib->vba.MinDPPCLKUsingSingleDPP[k]

								* (1.0
@@ -4790,14 +4790,14 @@ static void ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_ 
								<= mode_lib->vba.MaximumSwathWidth[k]

						&& mode_lib->vba.ODMCombineEnablePerState[i][k]

								== false) {

					mode_lib->vba.NoOfDPP[i][k] = 1.0;

					mode_lib->vba.NoOfDPP[i][k] = 1;

					mode_lib->vba.RequiredDPPCLK[i][k] =

							mode_lib->vba.MinDPPCLKUsingSingleDPP[k]

									* (1.0

											+ mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading

													/ 100.0);

				} else {

					mode_lib->vba.NoOfDPP[i][k] = 2.0;

					mode_lib->vba.NoOfDPP[i][k] = 2;

					mode_lib->vba.RequiredDPPCLK[i][k] =

							mode_lib->vba.MinDPPCLKUsingSingleDPP[k]

									* (1.0
@@ -4833,14 +4833,14 @@ static void ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_ 
				mode_lib->vba.ODMCombineEnablePerState[i][k] = false;

				if (mode_lib->vba.SwathWidthYSingleDPP[k]

						<= mode_lib->vba.MaximumSwathWidth[k]) {

					mode_lib->vba.NoOfDPP[i][k] = 1.0;

					mode_lib->vba.NoOfDPP[i][k] = 1;

					mode_lib->vba.RequiredDPPCLK[i][k] =

							mode_lib->vba.MinDPPCLKUsingSingleDPP[k]

									* (1.0

											+ mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading

													/ 100.0);

				} else {

					mode_lib->vba.NoOfDPP[i][k] = 2.0;

					mode_lib->vba.NoOfDPP[i][k] = 2;

					mode_lib->vba.RequiredDPPCLK[i][k] =

							mode_lib->vba.MinDPPCLKUsingSingleDPP[k]

									* (1.0

drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h

+1 −1
Original line number Diff line number Diff line
@@ -489,7 +489,7 @@ struct vba_vars_st { 
	double CursorBufferSize;

	double CursorChunkSize;

	unsigned int Mode;

	double NoOfDPP[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];

	unsigned int NoOfDPP[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];

	double OutputLinkDPLanes[DC__NUM_DPP__MAX];

	double SwathWidthYPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];

	double SwathHeightYPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];

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