Commit f61959b6 authored May 11, 2020 by Jon Derrick Committed by Lorenzo Pieralisi May 22, 2020

PCI: pci-bridge-emul: Fix Root Cap/Status comment

The upper 16-bits of Root Control contain the Root Capabilities
register. The code instead describes the Root Status register in the
upper 16-bits, although it uses the correct bit definition for Root
Capabilities, and for Root Status in the next definition.

Fix this comment and add a comment describing the Root Status register.

Link: https://lore.kernel.org/r/20200511162117.6674-3-jonathan.derrick@intel.com

Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Rob Herring <robh@kernel.org>

parent c88d1918

drivers/pci/pci-bridge-emul.c

+5 −1

Original line number	Diff line number	Diff line
		@@ -234,7 +234,7 @@ static const struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
		* Root control has bits [4:0] RW, the rest is
		* reserved.
		*
		* Root status has bit 0 RO, the rest is reserved.
		* Root capabilities has bit 0 RO, the rest is reserved.
		*/
		.rw = (PCI_EXP_RTCTL_SECEE \| PCI_EXP_RTCTL_SENFEE \|
		PCI_EXP_RTCTL_SEFEE \| PCI_EXP_RTCTL_PMEIE \|
		@@ -244,6 +244,10 @@ static const struct pci_bridge_reg_behavior pcie_cap_regs_behavior[] = {
		},

		[PCI_EXP_RTSTA / 4] = {
		/*
		* Root status has bits 17 and [15:0] RO, bit 16 W1C, the rest
		* is reserved.
		*/
		.ro = GENMASK(15, 0) \| PCI_EXP_RTSTA_PENDING,
		.w1c = PCI_EXP_RTSTA_PME,
		.rsvd = GENMASK(31, 18),