Commit f5ed50cb authored Nov 13, 2014 by Damien Lespiau Committed by Daniel Vetter Nov 14, 2014

drm/i915: Let's hope future platforms will use the same WM code as SKL



Given the history, there's some chance we'll keep the same WM code for a
bit (previously, we were able to reuse the same WM code from ILK to BDW,
so that sounds like a fair assumption).

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

parent 6e7cc470

drivers/gpu/drm/i915/intel_pm.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -7067,7 +7067,7 @@ void intel_init_pm(struct drm_device *dev)
		i915_ironlake_get_mem_freq(dev);

		/* For FIFO watermark updates */
		if (IS_GEN9(dev)) {
		if (INTEL_INFO(dev)->gen >= 9) {
		skl_setup_wm_latency(dev);

		dev_priv->display.init_clock_gating = gen9_init_clock_gating;

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