Commit f5d35d87 authored by Peng Fan's avatar Peng Fan Committed by Shawn Guo
Browse files

ARM: dts: imx: add nvmem property for cpu0



Add nvmem related property for cpu0, then nvmem API could be used
to read cpu speed grading to avoid directly read OCOTP registers
mapped which could not handle defer probe.

Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 98670a0b
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+2 −0
Original line number Diff line number Diff line
@@ -44,6 +44,8 @@
			arm-supply = <&reg_arm>;
			pu-supply = <&reg_pu>;
			soc-supply = <&reg_soc>;
			nvmem-cells = <&cpu_speed_grade>;
			nvmem-cell-names = "speed_grade";
		};

		cpu@1 {
+2 −0
Original line number Diff line number Diff line
@@ -49,6 +49,8 @@
			arm-supply = <&reg_arm>;
			pu-supply = <&reg_pu>;
			soc-supply = <&reg_soc>;
			nvmem-cells = <&cpu_speed_grade>;
			nvmem-cell-names = "speed_grade";
		};

		cpu1: cpu@1 {
+6 −0
Original line number Diff line number Diff line
@@ -1165,6 +1165,12 @@
				compatible = "fsl,imx6q-ocotp", "syscon";
				reg = <0x021bc000 0x4000>;
				clocks = <&clks IMX6QDL_CLK_IIM>;
				#address-cells = <1>;
				#size-cells = <1>;

				cpu_speed_grade: speed-grade@10 {
					reg = <0x10 4>;
				};
			};

			tzasc@21d0000 { /* TZASC1 */
+8 −0
Original line number Diff line number Diff line
@@ -74,6 +74,8 @@
			arm-supply = <&reg_arm>;
			pu-supply = <&reg_pu>;
			soc-supply = <&reg_soc>;
			nvmem-cells = <&cpu_speed_grade>;
			nvmem-cell-names = "speed_grade";
		};
	};

@@ -953,6 +955,12 @@
				compatible = "fsl,imx6sl-ocotp", "syscon";
				reg = <0x021bc000 0x4000>;
				clocks = <&clks IMX6SL_CLK_OCOTP>;
				#address-cells = <1>;
				#size-cells = <1>;

				cpu_speed_grade: speed-grade@10 {
					reg = <0x10 4>;
				};
			};

			audmux: audmux@21d8000 {
+6 −0
Original line number Diff line number Diff line
@@ -72,6 +72,8 @@
				 <&clks IMX6SLL_CLK_PLL1_SYS>;
			clock-names = "arm", "pll2_pfd2_396m", "step",
				      "pll1_sw", "pll1_sys";
			nvmem-cells = <&cpu_speed_grade>;
			nvmem-cell-names = "speed_grade";
		};
	};

@@ -791,6 +793,10 @@
				reg = <0x021bc000 0x4000>;
				clocks = <&clks IMX6SLL_CLK_OCOTP>;

				cpu_speed_grade: speed-grade@10 {
					reg = <0x10 4>;
				};

				tempmon_calib: calib@38 {
					reg = <0x38 4>;
				};
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