Commit f5863a00 authored by Suravee Suthikulpanit's avatar Suravee Suthikulpanit Committed by Ingo Molnar
Browse files

x86/events/amd/iommu.c: Modify functions to query max banks and counters 



Currently, amd_iommu_pc_get_max_[banks|counters]() use end-point device
ID to locate an IOMMU and check the reported max banks/counters. The
logic assumes that the IOMMU_BASE_DEVID belongs to the first IOMMU, and
uses it to acquire a reference to the first IOMMU, which does not work
on certain systems. Instead, modify the function to take an IOMMU index,
and use it to query the corresponding AMD IOMMU instance.

Currently, hardcode the IOMMU index to 0 since the current AMD IOMMU
perf implementation supports only a single IOMMU. A subsequent patch
will add support for multiple IOMMUs, and will use a proper IOMMU index.

Signed-off-by: default avatarSuravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Jörg Rödel <joro@8bytes.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: iommu@lists.linux-foundation.org
Link: http://lkml.kernel.org/r/1487926102-13073-7-git-send-email-Suravee.Suthikulpanit@amd.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 6b9376e3

arch/x86/events/amd/iommu.c

+7 −10
Original line number Diff line number Diff line
@@ -239,14 +239,6 @@ static int perf_iommu_event_init(struct perf_event *event) 
		return -EINVAL;

	}



	/* integrate with iommu base devid (0000), assume one iommu */

	perf_iommu->max_banks =

		amd_iommu_pc_get_max_banks(IOMMU_BASE_DEVID);

	perf_iommu->max_counters =

		amd_iommu_pc_get_max_counters(IOMMU_BASE_DEVID);

	if ((perf_iommu->max_banks == 0) || (perf_iommu->max_counters == 0))

		return -EINVAL;



	/* update the hw_perf_event struct with the iommu config data */

	hwc->config = config;

	hwc->extra_reg.config = config1;
@@ -448,6 +440,11 @@ static __init int _init_perf_amd_iommu( 
		return ret;

	}



	perf_iommu->max_banks    = amd_iommu_pc_get_max_banks(0);

	perf_iommu->max_counters = amd_iommu_pc_get_max_counters(0);

	if (!perf_iommu->max_banks || !perf_iommu->max_counters)

		return -EINVAL;



	perf_iommu->null_group = NULL;

	perf_iommu->pmu.attr_groups = perf_iommu->attr_groups;
@@ -457,8 +454,8 @@ static __init int _init_perf_amd_iommu( 
		amd_iommu_pc_exit();

	} else {

		pr_info("Detected AMD IOMMU (%d banks, %d counters/bank).\n",

			amd_iommu_pc_get_max_banks(IOMMU_BASE_DEVID),

			amd_iommu_pc_get_max_counters(IOMMU_BASE_DEVID));

			amd_iommu_pc_get_max_banks(0),

			amd_iommu_pc_get_max_counters(0));

	}



	return ret;

arch/x86/events/amd/iommu.h

+4 −5
Original line number Diff line number Diff line
@@ -24,19 +24,18 @@ 
#define PC_MAX_SPEC_BNKS			64

#define PC_MAX_SPEC_CNTRS			16



/* iommu pc reg masks*/

#define IOMMU_BASE_DEVID			0x0000



/* amd_iommu_init.c external support functions */

extern int amd_iommu_get_num_iommus(void);



extern bool amd_iommu_pc_supported(void);



extern u8 amd_iommu_pc_get_max_banks(u16 devid);

extern u8 amd_iommu_pc_get_max_banks(unsigned int idx);



extern u8 amd_iommu_pc_get_max_counters(u16 devid);

extern u8 amd_iommu_pc_get_max_counters(unsigned int idx);



extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr,

			u8 fxn, u64 *value, bool is_write);



extern struct amd_iommu *get_amd_iommu(int idx);



#endif /*_PERF_EVENT_AMD_IOMMU_H_*/

drivers/iommu/amd_iommu_init.c

+20 −14
Original line number Diff line number Diff line
@@ -2718,6 +2718,18 @@ bool amd_iommu_v2_supported(void) 
}

EXPORT_SYMBOL(amd_iommu_v2_supported);



struct amd_iommu *get_amd_iommu(unsigned int idx)

{

	unsigned int i = 0;

	struct amd_iommu *iommu;



	for_each_iommu(iommu)

		if (i++ == idx)

			return iommu;

	return NULL;

}

EXPORT_SYMBOL(get_amd_iommu);



/****************************************************************************

 *

 * IOMMU EFR Performance Counter support functionality. This code allows
@@ -2725,17 +2737,14 @@ EXPORT_SYMBOL(amd_iommu_v2_supported); 
 *

 ****************************************************************************/



u8 amd_iommu_pc_get_max_banks(u16 devid)

u8 amd_iommu_pc_get_max_banks(unsigned int idx)

{

	struct amd_iommu *iommu;

	u8 ret = 0;

	struct amd_iommu *iommu = get_amd_iommu(idx);



	/* locate the iommu governing the devid */

	iommu = amd_iommu_rlookup_table[devid];

	if (iommu)

		ret = iommu->max_banks;

		return iommu->max_banks;



	return ret;

	return 0;

}

EXPORT_SYMBOL(amd_iommu_pc_get_max_banks);
@@ -2745,17 +2754,14 @@ bool amd_iommu_pc_supported(void) 
}

EXPORT_SYMBOL(amd_iommu_pc_supported);



u8 amd_iommu_pc_get_max_counters(u16 devid)

u8 amd_iommu_pc_get_max_counters(unsigned int idx)

{

	struct amd_iommu *iommu;

	u8 ret = 0;

	struct amd_iommu *iommu = get_amd_iommu(idx);



	/* locate the iommu governing the devid */

	iommu = amd_iommu_rlookup_table[devid];

	if (iommu)

		ret = iommu->max_counters;

		return iommu->max_counters;



	return ret;

	return 0;

}

EXPORT_SYMBOL(amd_iommu_pc_get_max_counters);

drivers/iommu/amd_iommu_proto.h

+0 −2
Original line number Diff line number Diff line
@@ -59,8 +59,6 @@ extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev); 


/* IOMMU Performance Counter functions */

extern bool amd_iommu_pc_supported(void);

extern u8 amd_iommu_pc_get_max_banks(u16 devid);

extern u8 amd_iommu_pc_get_max_counters(u16 devid);

extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, u8 fxn,

				    u64 *value, bool is_write);

CRA Git | Maintained and supported by SUSTech CRA and CCSE