Commit f5691ad1 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'socfpga_dts_for_v5.1' of... 

Merge tag 'socfpga_dts_for_v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/dt

SoCFPGA DTS updates for v5.1
- Add SMMU node for Stratix10
- Add vendor prefix fo Novtech
- Add a new 96Boards Chameleon96 board that uses a Cyclone5 SoCFPGA
- Add missing reset properties for all IP on Cyclone5 and Arria10

* tag 'socfpga_dts_for_v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux

:
  ARM: dts: socfpga: update more missing reset properties
  ARM: dts: socfpga: update missing reset property peripherals
  ARM: dts: Add support for 96Boards Chameleon96 board
  dt-bindings: vendor-prefixes: Add Novtech Vendor Prefix
  arm64: dts: stratix10: Add Stratix10 SMMU support

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 01a8ab4e 1c909b2d

Documentation/devicetree/bindings/vendor-prefixes.txt

+1 −0
Original line number Diff line number Diff line
@@ -274,6 +274,7 @@ nintendo Nintendo 
nlt	NLT Technologies, Ltd.

nokia	Nokia

nordic	Nordic Semiconductor

novtech NovTech, Inc.

nutsboard	NutsBoard

nuvoton	Nuvoton Technology Corporation

nvd	New Vision Display

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -924,6 +924,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \ 
	socfpga_arria10_socdk_nand.dtb \

	socfpga_arria10_socdk_qspi.dtb \

	socfpga_arria10_socdk_sdmmc.dtb \

	socfpga_cyclone5_chameleon96.dtb \

	socfpga_cyclone5_mcvevk.dtb \

	socfpga_cyclone5_socdk.dtb \

	socfpga_cyclone5_de0_nano_soc.dtb \

arch/arm/boot/dts/socfpga.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -84,6 +84,7 @@ 
				#dma-requests = <32>;

				clocks = <&l4_main_clk>;

				clock-names = "apb_pclk";

				resets = <&rst DMA_RESET>;

			};

		};
@@ -100,6 +101,7 @@ 
			reg = <0xffc00000 0x1000>;

			interrupts = <0 131 4>, <0 132 4>, <0 133 4>, <0 134 4>;

			clocks = <&can0_clk>;

			resets = <&rst CAN0_RESET>;

			status = "disabled";

		};
@@ -108,6 +110,7 @@ 
			reg = <0xffc01000 0x1000>;

			interrupts = <0 135 4>, <0 136 4>, <0 137 4>, <0 138 4>;

			clocks = <&can1_clk>;

			resets = <&rst CAN1_RESET>;

			status = "disabled";

		};
@@ -585,6 +588,7 @@ 
			compatible = "snps,dw-apb-gpio";

			reg = <0xff708000 0x1000>;

			clocks = <&l4_mp_clk>;

			resets = <&rst GPIO0_RESET>;

			status = "disabled";



			porta: gpio-controller@0 {
@@ -605,6 +609,7 @@ 
			compatible = "snps,dw-apb-gpio";

			reg = <0xff709000 0x1000>;

			clocks = <&l4_mp_clk>;

			resets = <&rst GPIO1_RESET>;

			status = "disabled";



			portb: gpio-controller@0 {
@@ -625,6 +630,7 @@ 
			compatible = "snps,dw-apb-gpio";

			reg = <0xff70a000 0x1000>;

			clocks = <&l4_mp_clk>;

			resets = <&rst GPIO2_RESET>;

			status = "disabled";



			portc: gpio-controller@0 {
@@ -735,6 +741,7 @@ 
			#size-cells = <0>;

			clocks = <&l4_mp_clk>, <&sdmmc_clk_divided>;

			clock-names = "biu", "ciu";

			resets = <&rst SDMMC_RESET>;

			status = "disabled";

		};
@@ -748,6 +755,7 @@ 
			interrupts = <0x0 0x90 0x4>;

			clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;

			clock-names = "nand", "nand_x", "ecc";

			resets = <&rst NAND_RESET>;

			status = "disabled";

		};
@@ -767,6 +775,7 @@ 
			cdns,fifo-width = <4>;

			cdns,trigger-address = <0x00000000>;

			clocks = <&qspi_clk>;

			resets = <&rst QSPI_RESET>;

			status = "disabled";

		};
@@ -785,6 +794,7 @@ 
		sdr: sdr@ffc25000 {

			compatible = "altr,sdr-ctl", "syscon";

			reg = <0xffc25000 0x1000>;

			resets = <&rst SDR_RESET>;

		};



		sdramedac {
@@ -801,6 +811,7 @@ 
			interrupts = <0 154 4>;

			num-cs = <4>;

			clocks = <&spi_m_clk>;

			resets = <&rst SPIM0_RESET>;

			status = "disabled";

		};
@@ -812,6 +823,7 @@ 
			interrupts = <0 155 4>;

			num-cs = <4>;

			clocks = <&spi_m_clk>;

			resets = <&rst SPIM1_RESET>;

			status = "disabled";

		};
@@ -878,6 +890,7 @@ 
			dmas = <&pdma 28>,

			       <&pdma 29>;

			dma-names = "tx", "rx";

			resets = <&rst UART0_RESET>;

		};



		uart1: serial1@ffc03000 {
@@ -890,6 +903,7 @@ 
			dmas = <&pdma 30>,

			       <&pdma 31>;

			dma-names = "tx", "rx";

			resets = <&rst UART1_RESET>;

		};



		usbphy0: usbphy {
@@ -929,6 +943,7 @@ 
			reg = <0xffd02000 0x1000>;

			interrupts = <0 171 4>;

			clocks = <&osc1>;

			resets = <&rst L4WD0_RESET>;

			status = "disabled";

		};
@@ -937,6 +952,7 @@ 
			reg = <0xffd03000 0x1000>;

			interrupts = <0 172 4>;

			clocks = <&osc1>;

			resets = <&rst L4WD1_RESET>;

			status = "disabled";

		};

	};

arch/arm/boot/dts/socfpga_arria10.dtsi

+18 −0
Original line number Diff line number Diff line
@@ -470,6 +470,7 @@ 
			tx-fifo-depth = <4096>;

			rx-fifo-depth = <16384>;

			clocks = <&l4_mp_clk>;

			resets = <&rst EMAC2_RESET>;

			clock-names = "stmmaceth";

			snps,axi-config = <&socfpga_axi_setup>;

			status = "disabled";
@@ -480,6 +481,7 @@ 
			#size-cells = <0>;

			compatible = "snps,dw-apb-gpio";

			reg = <0xffc02900 0x100>;

			resets = <&rst GPIO0_RESET>;

			status = "disabled";



			porta: gpio-controller@0 {
@@ -499,6 +501,7 @@ 
			#size-cells = <0>;

			compatible = "snps,dw-apb-gpio";

			reg = <0xffc02a00 0x100>;

			resets = <&rst GPIO1_RESET>;

			status = "disabled";



			portb: gpio-controller@0 {
@@ -518,6 +521,7 @@ 
			#size-cells = <0>;

			compatible = "snps,dw-apb-gpio";

			reg = <0xffc02b00 0x100>;

			resets = <&rst GPIO2_RESET>;

			status = "disabled";



			portc: gpio-controller@0 {
@@ -548,6 +552,7 @@ 
			reg = <0xffc02200 0x100>;

			interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&l4_sp_clk>;

			resets = <&rst I2C0_RESET>;

			status = "disabled";

		};
@@ -558,6 +563,7 @@ 
			reg = <0xffc02300 0x100>;

			interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&l4_sp_clk>;

			resets = <&rst I2C1_RESET>;

			status = "disabled";

		};
@@ -568,6 +574,7 @@ 
			reg = <0xffc02400 0x100>;

			interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&l4_sp_clk>;

			resets = <&rst I2C2_RESET>;

			status = "disabled";

		};
@@ -578,6 +585,7 @@ 
			reg = <0xffc02500 0x100>;

			interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&l4_sp_clk>;

			resets = <&rst I2C3_RESET>;

			status = "disabled";

		};
@@ -588,6 +596,7 @@ 
			reg = <0xffc02600 0x100>;

			interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&l4_sp_clk>;

			resets = <&rst I2C4_RESET>;

			status = "disabled";

		};
@@ -600,6 +609,7 @@ 
			num-cs = <4>;

			/*32bit_access;*/

			clocks = <&spi_m_clk>;

			resets = <&rst SPIM0_RESET>;

			status = "disabled";

		};
@@ -614,6 +624,7 @@ 
			tx-dma-channel = <&pdma 16>;

			rx-dma-channel = <&pdma 17>;

			clocks = <&spi_m_clk>;

			resets = <&rst SPIM1_RESET>;

			status = "disabled";

		};
@@ -642,6 +653,7 @@ 
			fifo-depth = <0x400>;

			clocks = <&l4_mp_clk>, <&sdmmc_clk>;

			clock-names = "biu", "ciu";

			resets = <&rst SDMMC_RESET>;

			status = "disabled";

		};
@@ -655,6 +667,7 @@ 
			interrupts = <0 99 4>;

			clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;

			clock-names = "nand", "nand_x", "ecc";

			resets = <&rst NAND_RESET>;

			status = "disabled";

		};
@@ -739,6 +752,7 @@ 
			cdns,fifo-width = <4>;

			cdns,trigger-address = <0x00000000>;

			clocks = <&qspi_clk>;

			resets = <&rst QSPI_RESET>;

			status = "disabled";

		};
@@ -815,6 +829,7 @@ 
			reg-shift = <2>;

			reg-io-width = <4>;

			clocks = <&l4_sp_clk>;

			resets = <&rst UART0_RESET>;

			status = "disabled";

		};
@@ -825,6 +840,7 @@ 
			reg-shift = <2>;

			reg-io-width = <4>;

			clocks = <&l4_sp_clk>;

			resets = <&rst UART1_RESET>;

			status = "disabled";

		};
@@ -865,6 +881,7 @@ 
			reg = <0xffd00200 0x100>;

			interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&l4_sys_free_clk>;

			resets = <&rst L4WD0_RESET>;

			status = "disabled";

		};
@@ -873,6 +890,7 @@ 
			reg = <0xffd00300 0x100>;

			interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&l4_sys_free_clk>;

			resets = <&rst L4WD1_RESET>;

			status = "disabled";

		};

	};

arch/arm/boot/dts/socfpga_cyclone5_chameleon96.dts

0 → 100644
+130 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0 OR MIT)

/*

 * Device Tree file for the Chameleon96

 *

 * Copyright (c) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

 */



#include <dt-bindings/gpio/gpio.h>



#include "socfpga_cyclone5.dtsi"



/ {

	model = "Novetech Chameleon96";

	compatible = "novtech,chameleon96", "altr,socfpga-cyclone5", "altr,socfpga";



	chosen {

		bootargs = "earlyprintk";

		stdout-path = "serial0:115200n8";

	};



	memory@0 {

		name = "memory";

		device_type = "memory";

		reg = <0x0 0x20000000>; /* 512MB */

	};



	regulator_3_3v: 3-3-v-regulator {

		compatible = "regulator-fixed";

		regulator-name = "3.3V";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

	};



	leds {

		compatible = "gpio-leds";



		user_led1 {

			label = "green:user1";

			gpios = <&porta 14 GPIO_ACTIVE_LOW>;

			linux,default-trigger = "heartbeat";

		};



		user_led2 {

			label = "green:user2";

			gpios = <&porta 22 GPIO_ACTIVE_LOW>;

			linux,default-trigger = "mmc0";

		};



		user_led3 {

			label = "green:user3";

			gpios = <&porta 25 GPIO_ACTIVE_LOW>;

			linux,default-trigger = "none";

		};



		user_led4 {

			label = "green:user4";

			gpios = <&portb 3 GPIO_ACTIVE_LOW>;

			panic-indicator;

			linux,default-trigger = "none";

		};

	};

};



&gpio0 {

	status = "okay";

};



&gpio1 {

	status = "okay";

};



&i2c0 {

	/* On Low speed expansion */

	label = "LS-I2C0";

	status = "okay";

};



&i2c1 {

	/* On Low speed expansion */

	label = "LS-I2C1";

	status = "okay";

};



&i2c2 {

	status = "okay";

};



&i2c3 {

	/* On High speed expansion */

	label = "HS-I2C2";

	status = "okay";

};



&mmc0 {

	vmmc-supply = <&regulator_3_3v>;

	vqmmc-supply = <&regulator_3_3v>;

	status = "okay";

};



&spi0 {

	/* On High speed expansion */

	label = "HS-SPI1";

	status = "okay";

};



&spi1 {

	/* On Low speed expansion */

	label = "LS-SPI0";

	status = "okay";

};



&uart0 {

	/* On Low speed expansion */

	label = "LS-UART1";

	status = "okay";

};



&uart1 {

	/* On Low speed expansion */

	label = "LS-UART0";

	status = "okay";

};



&usbphy0 {

	status = "okay";

};



&usb1 {

	status = "okay";

};

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