Commit f5619492 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding
Browse files

ARM: tegra: Change tegra_set_cpu_in_lp2() type to void 



The Tegra30 CPUIDLE driver has intention to check whether primary CPU was
the last CPU that entered LP2 (CC6) idle-state, but that functionality
never got utilized because driver never supported the CC6 state for the
case where any secondary CPU is online. The new cpuidle driver will
properly support CC6 on Tegra30, including the case where secondary CPUs
are online, and that knowledge about what CPUs entered into CC6 won't be
needed at all because new driver will use different approach by making use
of the coupled idle-state and explicitly parking secondary CPUs before
entering into CC6. Thus this patch is just a minor cleanup change.

Acked-by: default avatarPeter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: default avatarPeter Geis <pgwipeout@gmail.com>
Tested-by: default avatarJasper Korten <jja2000@gmail.com>
Tested-by: default avatarDavid Heidelberg <david@ixit.cz>
Tested-by: default avatarNicolas Chauvet <kwizart@gmail.com>
Acked-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent d90bdb72

arch/arm/mach-tegra/cpuidle-tegra30.c

+4 −10
Original line number Diff line number Diff line
@@ -98,22 +98,16 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, 
			    int index)

{

	bool entered_lp2 = false;

	bool last_cpu;



	local_fiq_disable();



	last_cpu = tegra_set_cpu_in_lp2();

	tegra_set_cpu_in_lp2();

	cpu_pm_enter();



	if (dev->cpu == 0) {

		if (last_cpu)

			entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv,

								     index);

	if (dev->cpu == 0)

		entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv, index);

	else

			cpu_do_idle();

	} else {

		entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index);

	}



	cpu_pm_exit();

	tegra_clear_cpu_in_lp2();

arch/arm/mach-tegra/pm.c

+1 −7
Original line number Diff line number Diff line
@@ -123,11 +123,9 @@ void tegra_clear_cpu_in_lp2(void) 
	spin_unlock(&tegra_lp2_lock);

}



bool tegra_set_cpu_in_lp2(void)

void tegra_set_cpu_in_lp2(void)

{

	int phy_cpu_id = cpu_logical_map(smp_processor_id());

	bool last_cpu = false;

	cpumask_t *cpu_lp2_mask = tegra_cpu_lp2_mask;

	u32 *cpu_in_lp2 = tegra_cpu_lp2_mask;



	spin_lock(&tegra_lp2_lock);
@@ -135,11 +133,7 @@ bool tegra_set_cpu_in_lp2(void) 
	BUG_ON((*cpu_in_lp2 & BIT(phy_cpu_id)));

	*cpu_in_lp2 |= BIT(phy_cpu_id);



	if ((phy_cpu_id == 0) && cpumask_equal(cpu_lp2_mask, cpu_online_mask))

		last_cpu = true;



	spin_unlock(&tegra_lp2_lock);

	return last_cpu;

}



static int tegra_sleep_cpu(unsigned long v2p)

arch/arm/mach-tegra/pm.h

+1 −1
Original line number Diff line number Diff line
@@ -24,7 +24,7 @@ void tegra30_lp1_iram_hook(void); 
void tegra30_sleep_core_init(void);



void tegra_clear_cpu_in_lp2(void);

bool tegra_set_cpu_in_lp2(void);

void tegra_set_cpu_in_lp2(void);

void tegra_idle_lp2_last(void);

extern void (*tegra_tear_down_cpu)(void);

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