Commit f5506e82 authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Kevin Hilman
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ARM: dts: meson8b: add the ARM TWD timer



The Meson8B SoC is using four ARM Cortex-A5 cores which come with a
"TWD" (Timer-Watchdog) based timer. This adds support for the ARM TWD
Timer on this SoC.

Suggested-by: default avatarCarlo Caione <carlo@endlessm.com>
[ rebased patch from Carlo, use IRQ_TYPE_EDGE_RISING instead of
  IRQ_TYPE_LEVEL_LOW to prevent "GIC: PPI13 is secure or misconfigured"
  message during boot, use pre-processor macros to specify the IRQ,
  added the correct clock, dropped TWD watchdog node since there's no
  driver for it anymore ]
Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
parent 2710e8d2
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+7 −0
Original line number Diff line number Diff line
@@ -349,6 +349,13 @@
		compatible = "arm,cortex-a5-scu";
		reg = <0x0 0x100>;
	};

	timer@600 {
		compatible = "arm,cortex-a5-twd-timer";
		reg = <0x600 0x20>;
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
		clocks = <&clkc CLKID_PERIPH>;
	};
};

&pwm_ab {