Commit f52b69f8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'sh-for-linus' of git://github.com/pmundt/linux-sh 

Pull SuperH updates from Paul Mundt.

* tag 'sh-for-linus' of git://github.com/pmundt/linux-sh: (25 commits)
  sh: Support I/O space swapping where needed.
  sh: use set_current_blocked() and block_sigmask()
  sh: no need to reset handler if SA_ONESHOT
  sh: intc: Fix up section mismatch for intc_ack_data
  sh: select ARCH_DISCARD_MEMBLOCK.
  sh: Consolidate duplicate _32/_64 unistd definitions.
  sh: ecovec: switch SDHI controllers to card polling
  sh: Avoid exporting unimplemented syscalls.
  sh: add platform_device for RSPI in setup-sh7757
  SH: pci-sh7780: enable big-endian operation.
  serial: sh-sci: fix a race of DMA submit_tx on transfer
  sh: dma: Collect up CHCR of SH7763, SH7764, SH7780 and SH7785
  sh: dma: Collect up CHCR of SH7723 and SH7730
  sh/next: Fix build fail by asm/system.h in asm/bitops.h
  arch/sh/drivers/dma/{dma-g2,dmabrg}.c: ensure arguments to request_irq and free_irq are compatible
  sh: cpufreq: Wire up scaling_available_freqs support.
  sh: cpufreq: notify about rate rounding fallback.
  sh: cpufreq: Support CPU clock frequency table.
  sh: cpufreq: struct device lookup from CPU topology.
  sh: cpufreq: percpu struct clk accounting.
  ...
parents 2f7fa1be b7e68d68

arch/sh/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ config SUPERH 
	select HAVE_IDE if HAS_IOPORT

	select HAVE_MEMBLOCK

	select HAVE_MEMBLOCK_NODE_MAP

	select ARCH_DISCARD_MEMBLOCK

	select HAVE_OPROFILE

	select HAVE_GENERIC_DMA_COHERENT

	select HAVE_ARCH_TRACEHOOK
@@ -161,6 +162,9 @@ config NO_IOPORT 
config IO_TRAPPED

	bool



config SWAP_IO_SPACE

	bool



config DMA_COHERENT

	bool

arch/sh/boards/mach-ecovec24/setup.c

+63 −41
Original line number Diff line number Diff line
@@ -522,11 +522,18 @@ static void sdhi0_set_pwr(struct platform_device *pdev, int state) 
	gpio_set_value(GPIO_PTB6, state);

}



static int sdhi0_get_cd(struct platform_device *pdev)

{

	return !gpio_get_value(GPIO_PTY7);

}



static struct sh_mobile_sdhi_info sdhi0_info = {

	.dma_slave_tx	= SHDMA_SLAVE_SDHI0_TX,

	.dma_slave_rx	= SHDMA_SLAVE_SDHI0_RX,

	.set_pwr	= sdhi0_set_pwr,

	.tmio_caps      = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,

	.tmio_caps      = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |

			  MMC_CAP_NEEDS_POLL,

	.get_cd		= sdhi0_get_cd,

};



static struct resource sdhi0_resources[] = {
@@ -559,11 +566,18 @@ static void sdhi1_set_pwr(struct platform_device *pdev, int state) 
	gpio_set_value(GPIO_PTB7, state);

}



static int sdhi1_get_cd(struct platform_device *pdev)

{

	return !gpio_get_value(GPIO_PTW7);

}



static struct sh_mobile_sdhi_info sdhi1_info = {

	.dma_slave_tx	= SHDMA_SLAVE_SDHI1_TX,

	.dma_slave_rx	= SHDMA_SLAVE_SDHI1_RX,

	.tmio_caps      = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,

	.tmio_caps      = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |

			  MMC_CAP_NEEDS_POLL,

	.set_pwr	= sdhi1_set_pwr,

	.get_cd		= sdhi1_get_cd,

};



static struct resource sdhi1_resources[] = {
@@ -1001,6 +1015,7 @@ extern char ecovec24_sdram_leave_end; 
static int __init arch_setup(void)

{

	struct clk *clk;

	bool cn12_enabled = false;



	/* register board specific self-refresh code */

	sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
@@ -1201,9 +1216,13 @@ static int __init arch_setup(void) 
	gpio_direction_input(GPIO_PTR5);

	gpio_direction_input(GPIO_PTR6);



	/* SD-card slot CN11 */

	/* Card-detect, used on CN11, either with SDHI0 or with SPI */

	gpio_request(GPIO_PTY7, NULL);

	gpio_direction_input(GPIO_PTY7);



#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)

	/* enable SDHI0 on CN11 (needs DS2.4 set to ON) */

	gpio_request(GPIO_FN_SDHI0CD,  NULL);

	gpio_request(GPIO_FN_SDHI0WP,  NULL);

	gpio_request(GPIO_FN_SDHI0CMD, NULL);

	gpio_request(GPIO_FN_SDHI0CLK, NULL);
@@ -1213,23 +1232,6 @@ static int __init arch_setup(void) 
	gpio_request(GPIO_FN_SDHI0D0,  NULL);

	gpio_request(GPIO_PTB6, NULL);

	gpio_direction_output(GPIO_PTB6, 0);



#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)

	/* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */

	gpio_request(GPIO_FN_SDHI1CD,  NULL);

	gpio_request(GPIO_FN_SDHI1WP,  NULL);

	gpio_request(GPIO_FN_SDHI1CMD, NULL);

	gpio_request(GPIO_FN_SDHI1CLK, NULL);

	gpio_request(GPIO_FN_SDHI1D3,  NULL);

	gpio_request(GPIO_FN_SDHI1D2,  NULL);

	gpio_request(GPIO_FN_SDHI1D1,  NULL);

	gpio_request(GPIO_FN_SDHI1D0,  NULL);

	gpio_request(GPIO_PTB7, NULL);

	gpio_direction_output(GPIO_PTB7, 0);



	/* I/O buffer drive ability is high for SDHI1 */

	__raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);

#endif /* CONFIG_MMC_SH_MMCIF */

#else

	/* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */

	gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
@@ -1241,12 +1243,51 @@ static int __init arch_setup(void) 
	gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */

	gpio_request(GPIO_PTY6, NULL); /* write protect */

	gpio_direction_input(GPIO_PTY6);

	gpio_request(GPIO_PTY7, NULL); /* card detect */

	gpio_direction_input(GPIO_PTY7);



	spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));

#endif



	/* MMC/SD-card slot CN12 */

#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)

	/* enable MMCIF (needs DS2.6,7 set to OFF,ON) */

	gpio_request(GPIO_FN_MMC_D7, NULL);

	gpio_request(GPIO_FN_MMC_D6, NULL);

	gpio_request(GPIO_FN_MMC_D5, NULL);

	gpio_request(GPIO_FN_MMC_D4, NULL);

	gpio_request(GPIO_FN_MMC_D3, NULL);

	gpio_request(GPIO_FN_MMC_D2, NULL);

	gpio_request(GPIO_FN_MMC_D1, NULL);

	gpio_request(GPIO_FN_MMC_D0, NULL);

	gpio_request(GPIO_FN_MMC_CLK, NULL);

	gpio_request(GPIO_FN_MMC_CMD, NULL);

	gpio_request(GPIO_PTB7, NULL);

	gpio_direction_output(GPIO_PTB7, 0);



	cn12_enabled = true;

#elif defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)

	/* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */

	gpio_request(GPIO_FN_SDHI1WP,  NULL);

	gpio_request(GPIO_FN_SDHI1CMD, NULL);

	gpio_request(GPIO_FN_SDHI1CLK, NULL);

	gpio_request(GPIO_FN_SDHI1D3,  NULL);

	gpio_request(GPIO_FN_SDHI1D2,  NULL);

	gpio_request(GPIO_FN_SDHI1D1,  NULL);

	gpio_request(GPIO_FN_SDHI1D0,  NULL);

	gpio_request(GPIO_PTB7, NULL);

	gpio_direction_output(GPIO_PTB7, 0);



	/* Card-detect, used on CN12 with SDHI1 */

	gpio_request(GPIO_PTW7, NULL);

	gpio_direction_input(GPIO_PTW7);



	cn12_enabled = true;

#endif



	if (cn12_enabled)

		/* I/O buffer drive ability is high for CN12 */

		__raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000,

			     IODRIVEA);



	/* enable Video */

	gpio_request(GPIO_PTU2, NULL);

	gpio_direction_output(GPIO_PTU2, 1);
@@ -1305,25 +1346,6 @@ static int __init arch_setup(void) 
	gpio_request(GPIO_PTU5, NULL);

	gpio_direction_output(GPIO_PTU5, 0);



#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)

	/* enable MMCIF (needs DS2.6,7 set to OFF,ON) */

	gpio_request(GPIO_FN_MMC_D7, NULL);

	gpio_request(GPIO_FN_MMC_D6, NULL);

	gpio_request(GPIO_FN_MMC_D5, NULL);

	gpio_request(GPIO_FN_MMC_D4, NULL);

	gpio_request(GPIO_FN_MMC_D3, NULL);

	gpio_request(GPIO_FN_MMC_D2, NULL);

	gpio_request(GPIO_FN_MMC_D1, NULL);

	gpio_request(GPIO_FN_MMC_D0, NULL);

	gpio_request(GPIO_FN_MMC_CLK, NULL);

	gpio_request(GPIO_FN_MMC_CMD, NULL);

	gpio_request(GPIO_PTB7, NULL);

	gpio_direction_output(GPIO_PTB7, 0);



	/* I/O buffer drive ability is high for MMCIF */

	__raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);

#endif



	/* enable I2C device */

	i2c_register_board_info(0, i2c0_devices,

				ARRAY_SIZE(i2c0_devices));

arch/sh/drivers/dma/dma-g2.c

+2 −2
Original line number Diff line number Diff line
@@ -181,14 +181,14 @@ static int __init g2_dma_init(void) 


	ret = register_dmac(&g2_dma_info);

	if (unlikely(ret != 0))

		free_irq(HW_EVENT_G2_DMA, 0);

		free_irq(HW_EVENT_G2_DMA, &g2_dma_info);



	return ret;

}



static void __exit g2_dma_exit(void)

{

	free_irq(HW_EVENT_G2_DMA, 0);

	free_irq(HW_EVENT_G2_DMA, &g2_dma_info);

	unregister_dmac(&g2_dma_info);

}

arch/sh/drivers/dma/dmabrg.c

+2 −2
Original line number Diff line number Diff line
@@ -189,8 +189,8 @@ static int __init dmabrg_init(void) 
	if (ret == 0)

		return ret;



	free_irq(DMABRGI1, 0);

out1:	free_irq(DMABRGI0, 0);

	free_irq(DMABRGI1, NULL);

out1:	free_irq(DMABRGI0, NULL);

out0:	kfree(dmabrg_handlers);

	return ret;

}

arch/sh/drivers/pci/pci-sh7780.c

+12 −3
Original line number Diff line number Diff line
@@ -21,6 +21,13 @@ 
#include <asm/mmu.h>

#include <asm/sizes.h>



#if defined(CONFIG_CPU_BIG_ENDIAN)

# define PCICR_ENDIANNESS SH4_PCICR_BSWP

#else

# define PCICR_ENDIANNESS 0

#endif





static struct resource sh7785_pci_resources[] = {

	{

		.name	= "PCI IO",
@@ -254,7 +261,7 @@ static int __init sh7780_pci_init(void) 
	__raw_writel(PCIECR_ENBL, PCIECR);



	/* Reset */

	__raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_PRST,

	__raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_PRST | PCICR_ENDIANNESS,

		     chan->reg_base + SH4_PCICR);



	/*
@@ -290,7 +297,8 @@ static int __init sh7780_pci_init(void) 
	 * Now throw it in to register initialization mode and

	 * start the real work.

	 */

	__raw_writel(SH4_PCICR_PREFIX, chan->reg_base + SH4_PCICR);

	__raw_writel(SH4_PCICR_PREFIX | PCICR_ENDIANNESS,

		     chan->reg_base + SH4_PCICR);



	memphys = __pa(memory_start);

	memsize = roundup_pow_of_two(memory_end - memory_start);
@@ -380,7 +388,8 @@ static int __init sh7780_pci_init(void) 
	 * Initialization mode complete, release the control register and

	 * enable round robin mode to stop device overruns/starvation.

	 */

	__raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO,

	__raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO |

		     PCICR_ENDIANNESS,

		     chan->reg_base + SH4_PCICR);



	ret = register_pci_controller(chan);

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