Merge tag 'drm-misc-next-2018-09-05' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

 to external devices using the OF graph reprensentation (see ../graph.txt).

 At least one port node is required.

Optional properties in grandchild nodes:

 Any endpoint grandchild node may specify a desired video interface

 according to ../../media/video-interfaces.txt, specifically

 - bus-width: recognized values are <12>, <16>, <18> and <24>, and

   override any output mode selection heuristic, forcing "rgb444",

   "rgb565", "rgb666" and "rgb888" respectively.

Example:

	hlcdc: hlcdc@f0030000 {

			#pwm-cells = <3>;

		};

	};

Example 2: With a video interface override to force rgb565; as above

but with these changes/additions:

	&hlcdc {

		hlcdc-display-controller {

			pinctrl-names = "default";

			pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb565>;

			port@0 {

				hlcdc_panel_output: endpoint@0 {

					bus-width = <16>;

				};

			};

		};

	};

Required properties:

- compatible: Must be "lvds-encoder"

- compatible: Must be one or more of the following

  - "ti,ds90c185" for the TI DS90C185 FPD-Link Serializer

  - "lvds-encoder" for a generic LVDS encoder device

  When compatible with the generic version, nodes must list the

  device-specific version corresponding to the device first

  followed by the generic version.

Required nodes:

SN65DSI86 DSI to eDP bridge chip

--------------------------------

This is the binding for Texas Instruments SN65DSI86 bridge.

http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf

Required properties:

- compatible: Must be "ti,sn65dsi86"

- reg: i2c address of the chip, 0x2d as per datasheet

- enable-gpios: gpio specification for bridge_en pin (active high)

- vccio-supply: A 1.8V supply that powers up the digital IOs.

- vpll-supply: A 1.8V supply that powers up the displayport PLL.

- vcca-supply: A 1.2V supply that powers up the analog circuits.

- vcc-supply: A 1.2V supply that powers up the digital core.

Optional properties:

- interrupts-extended: Specifier for the SN65DSI86 interrupt line.

- gpio-controller: Marks the device has a GPIO controller.

- #gpio-cells    : Should be two. The first cell is the pin number and

                   the second cell is used to specify flags.

                   See ../../gpio/gpio.txt for more information.

- #pwm-cells : Should be one. See ../../pwm/pwm.txt for description of

               the cell formats.

- clock-names: should be "refclk"

- clocks: Specification for input reference clock. The reference

	  clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz.

- data-lanes: See ../../media/video-interface.txt

- lane-polarities: See ../../media/video-interface.txt

- suspend-gpios: specification for GPIO1 pin on bridge (active low)

Required nodes:

This device has two video ports. Their connections are modelled using the

OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.

- Video port 0 for DSI input

- Video port 1 for eDP output

Example

-------

edp-bridge@2d {

	compatible = "ti,sn65dsi86";

	#address-cells = <1>;

	#size-cells = <0>;

	reg = <0x2d>;

	enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>;

	suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>;

	interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>;

	vccio-supply = <&pm8916_l17>;

	vcca-supply = <&pm8916_l6>;

	vpll-supply = <&pm8916_l17>;

	vcc-supply = <&pm8916_l6>;

	clock-names = "refclk";

	clocks = <&input_refclk>;

	ports {

		#address-cells = <1>;

		#size-cells = <0>;

		port@0 {

			reg = <0>;

			edp_bridge_in: endpoint {

				remote-endpoint = <&dsi_out>;

			};

		};

		port@1 {

			reg = <1>;

			edp_bridge_out: endpoint {

				data-lanes = <2 1 3 0>;

				lane-polarities = <0 1 0 1>;

				remote-endpoint = <&edp_panel_in>;

			};

		};

	};

}

TC358764 MIPI-DSI to LVDS panel bridge

Required properties:

  - compatible: "toshiba,tc358764"

  - reg: the virtual channel number of a DSI peripheral

  - vddc-supply: core voltage supply, 1.2V

  - vddio-supply: I/O voltage supply, 1.8V or 3.3V

  - vddlvds-supply: LVDS1/2 voltage supply, 3.3V

  - reset-gpios: a GPIO spec for the reset pin

The device node can contain following 'port' child nodes,

according to the OF graph bindings defined in [1]:

  0: DSI Input, not required, if the bridge is DSI controlled

  1: LVDS Output, mandatory

[1]: Documentation/devicetree/bindings/media/video-interfaces.txt

Example:

	bridge@0 {

		reg = <0>;

		compatible = "toshiba,tc358764";

		vddc-supply = <&vcc_1v2_reg>;

		vddio-supply = <&vcc_1v8_reg>;

		vddlvds-supply = <&vcc_3v3_reg>;

		reset-gpios = <&gpd1 6 GPIO_ACTIVE_LOW>;

		#address-cells = <1>;

		#size-cells = <0>;

		port@1 {

			reg = <1>;

			lvds_ep: endpoint {

				remote-endpoint = <&panel_ep>;

			};

		};

	};

host. Experience shows that this is true for the large majority of setups.

DSI host

--------

========

In addition to the standard properties and those defined by the parent bus of

a DSI host, the following properties apply to a node representing a DSI host.

- #size-cells: Should be 0. There are cases where it makes sense to use a

  different value here. See below.

Optional properties:

- clock-master: boolean. Should be enabled if the host is being used in

  conjunction with another DSI host to drive the same peripheral. Hardware

  supporting such a configuration generally requires the data on both the busses

  to be driven by the same clock. Only the DSI host instance controlling this

  clock should contain this property.

DSI peripheral

--------------

==============

Peripherals with DSI as control bus, or no control bus

------------------------------------------------------

Peripherals are represented as child nodes of the DSI host's node. Properties

described here apply to all DSI peripherals, but individual bindings may want

to define additional, device-specific properties.

Peripherals with the DSI bus as the primary control bus, or peripherals with

no control bus but use the DSI bus to transmit pixel data are represented

as child nodes of the DSI host's node. Properties described here apply to all

DSI peripherals, but individual bindings may want to define additional,

device-specific properties.

Required properties:

- reg: The virtual channel number of a DSI peripheral. Must be in the range

  property is the number of the first virtual channel and the second cell is

  the number of consecutive virtual channels.

Example

-------

Peripherals with a different control bus

----------------------------------------

There are peripherals that have I2C/SPI (or some other non-DSI bus) as the

primary control bus, but are also connected to a DSI bus (mostly for the data

path). Connections between such peripherals and a DSI host can be represented

using the graph bindings [1], [2].

Peripherals that support dual channel DSI

-----------------------------------------

Peripherals with higher bandwidth requirements can be connected to 2 DSI

busses. Each DSI bus/channel drives some portion of the pixel data (generally

left/right half of each line of the display, or even/odd lines of the display).

The graph bindings should be used to represent the multiple DSI busses that are

connected to this peripheral. Each DSI host's output endpoint can be linked to

an input endpoint of the DSI peripheral.

[1] Documentation/devicetree/bindings/graph.txt

[2] Documentation/devicetree/bindings/media/video-interfaces.txt

Examples

========

- (1), (2) and (3) are examples of a DSI host and peripheral on the DSI bus

  with different virtual channel configurations.

- (4) is an example of a peripheral on a I2C control bus connected to a

  DSI host using of-graph bindings.

- (5) is an example of 2 DSI hosts driving a dual-channel DSI peripheral,

  which uses I2C as its primary control bus.

1)

	dsi-host {

		...

		...

	};

2)

	dsi-host {

		...

		...

	};

3)

	dsi-host {

		...

		...

	};

4)

	i2c-host {

		...

		dsi-bridge@35 {

			compatible = "...";

			reg = <0x35>;

			ports {

				...

				port {

					bridge_mipi_in: endpoint {

						remote-endpoint = <&host_mipi_out>;

					};

				};

			};

		};

	};

	dsi-host {

		...

		ports {

			...

			port {

				host_mipi_out: endpoint {

					remote-endpoint = <&bridge_mipi_in>;

				};

			};

		};

	};

5)

	i2c-host {

		dsi-bridge@35 {

			compatible = "...";

			reg = <0x35>;

			ports {

				#address-cells = <1>;

				#size-cells = <0>;

				port@0 {

					reg = <0>;

					dsi0_in: endpoint {

						remote-endpoint = <&dsi0_out>;

					};

				};

				port@1 {

					reg = <1>;

					dsi1_in: endpoint {

						remote-endpoint = <&dsi1_out>;

					};

				};

			};

		};

	};

	dsi0-host {

		...

		/*

		 * this DSI instance drives the clock for both the host

		 * controllers

		 */

		clock-master;

		ports {

			...

			port {

				dsi0_out: endpoint {

					remote-endpoint = <&dsi0_in>;

				};

			};

		};

	};

	dsi1-host {

		...

		ports {

			...

			port {

				dsi1_out: endpoint {

					remote-endpoint = <&dsi1_in>;

				};

			};

		};

	};