Commit f5031000 authored by David Francis's avatar David Francis Committed by Alex Deucher
Browse files

drm/amd/display: Refactor pageflips plane commit 



[Why]
commit_planes is indented quite far

[How]
Move the pageflip code from an if statement to after a
continue

Signed-off-by: default avatarDavid Francis <David.Francis@amd.com>
Reviewed-by: default avatarNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 34bafd27

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+64 −68
Original line number Diff line number Diff line
@@ -4712,11 +4712,41 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, 


		dc_plane = dm_new_plane_state->dc_state;



		bundle->surface_updates[planes_count].surface = dc_plane;

		if (new_pcrtc_state->color_mgmt_changed) {

			bundle->surface_updates[planes_count].gamma = dc_plane->gamma_correction;

			bundle->surface_updates[planes_count].in_transfer_func = dc_plane->in_transfer_func;

		}





		bundle->scaling_infos[planes_count].scaling_quality = dc_plane->scaling_quality;

		bundle->scaling_infos[planes_count].src_rect = dc_plane->src_rect;

		bundle->scaling_infos[planes_count].dst_rect = dc_plane->dst_rect;

		bundle->scaling_infos[planes_count].clip_rect = dc_plane->clip_rect;

		bundle->surface_updates[planes_count].scaling_info = &bundle->scaling_infos[planes_count];





		bundle->plane_infos[planes_count].color_space = dc_plane->color_space;

		bundle->plane_infos[planes_count].format = dc_plane->format;

		bundle->plane_infos[planes_count].plane_size = dc_plane->plane_size;

		bundle->plane_infos[planes_count].rotation = dc_plane->rotation;

		bundle->plane_infos[planes_count].horizontal_mirror = dc_plane->horizontal_mirror;

		bundle->plane_infos[planes_count].stereo_format = dc_plane->stereo_format;

		bundle->plane_infos[planes_count].tiling_info = dc_plane->tiling_info;

		bundle->plane_infos[planes_count].visible = dc_plane->visible;

		bundle->plane_infos[planes_count].per_pixel_alpha = dc_plane->per_pixel_alpha;

		bundle->plane_infos[planes_count].dcc = dc_plane->dcc;

		bundle->surface_updates[planes_count].plane_info = &bundle->plane_infos[planes_count];



		plane_needs_flip = old_plane_state->fb && new_plane_state->fb;



		pflip_present = pflip_present || plane_needs_flip;



		if (plane_needs_flip) {

		if (!plane_needs_flip) {

			planes_count += 1;

			continue;

		}



		/*

		 * TODO This might fail and hence better not used, wait

		 * explicitly on fences instead
@@ -4725,21 +4755,14 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, 
		 */

		abo = gem_to_amdgpu_bo(fb->obj[0]);

		r = amdgpu_bo_reserve(abo, true);

			if (unlikely(r != 0))

		if (unlikely(r != 0)) {

			DRM_ERROR("failed to reserve buffer before flip\n");

			WARN_ON(1);

		}



			/*

			 * Wait for all fences on this FB. Do limited wait to avoid

			 * deadlock during GPU reset when this fence will not signal

			 * but we hold reservation lock for the BO.

			 */

			r = reservation_object_wait_timeout_rcu(abo->tbo.resv,

								true, false,

								msecs_to_jiffies(5000));

			if (unlikely(r == 0))

				DRM_ERROR("Waiting for fences timed out.");





		/* Wait for all fences on this FB */

		WARN_ON(reservation_object_wait_timeout_rcu(abo->tbo.resv, true, false,

									    MAX_SCHEDULE_TIMEOUT) < 0);



		amdgpu_bo_get_tiling_flags(abo, &tiling_flags);
@@ -4778,33 +4801,6 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state, 
				 __func__,

				 bundle->flip_addrs[planes_count].address.grph.addr.high_part,

				 bundle->flip_addrs[planes_count].address.grph.addr.low_part);

		}



		bundle->surface_updates[planes_count].surface = dc_plane;

		if (new_pcrtc_state->color_mgmt_changed) {

			bundle->surface_updates[planes_count].gamma = dc_plane->gamma_correction;

			bundle->surface_updates[planes_count].in_transfer_func = dc_plane->in_transfer_func;

		}





		bundle->scaling_infos[planes_count].scaling_quality = dc_plane->scaling_quality;

		bundle->scaling_infos[planes_count].src_rect = dc_plane->src_rect;

		bundle->scaling_infos[planes_count].dst_rect = dc_plane->dst_rect;

		bundle->scaling_infos[planes_count].clip_rect = dc_plane->clip_rect;

		bundle->surface_updates[planes_count].scaling_info = &bundle->scaling_infos[planes_count];





		bundle->plane_infos[planes_count].color_space = dc_plane->color_space;

		bundle->plane_infos[planes_count].format = dc_plane->format;

		bundle->plane_infos[planes_count].plane_size = dc_plane->plane_size;

		bundle->plane_infos[planes_count].rotation = dc_plane->rotation;

		bundle->plane_infos[planes_count].horizontal_mirror = dc_plane->horizontal_mirror;

		bundle->plane_infos[planes_count].stereo_format = dc_plane->stereo_format;

		bundle->plane_infos[planes_count].tiling_info = dc_plane->tiling_info;

		bundle->plane_infos[planes_count].visible = dc_plane->visible;

		bundle->plane_infos[planes_count].per_pixel_alpha = dc_plane->per_pixel_alpha;

		bundle->plane_infos[planes_count].dcc = dc_plane->dcc;

		bundle->surface_updates[planes_count].plane_info = &bundle->plane_infos[planes_count];



		planes_count += 1;

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