Commit f4e2f7cc authored by Vineet Gupta's avatar Vineet Gupta
Browse files

ARC: mm: TLB Miss optim: avoid re-reading ECR 



For setting PTE Dirty bit, reuse the prior test for ST miss.

No need to reload ECR and test for ST cause code as the prev
condition code is still valid (uncloberred)

Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent 0fb1f35e

arch/arc/mm/tlbex.S

+0 −2
Original line number Original line Diff line number Diff line
@@ -380,9 +380,7 @@ ENTRY(EV_TLBMissD) 




	;----------------------------------------------------------------

	;----------------------------------------------------------------

	; UPDATE_PTE: Let Linux VM know that page was accessed/dirty

	; UPDATE_PTE: Let Linux VM know that page was accessed/dirty

	lr      r3, [ecr]

	or      r0, r0, _PAGE_ACCESSED        ; Accessed bit always

	or      r0, r0, _PAGE_ACCESSED        ; Accessed bit always

	btst_s  r3,  ECR_C_BIT_DTLB_ST_MISS   ; See if it was a Write Access ?

	or.nz   r0, r0, _PAGE_DIRTY           ; if Write, set Dirty bit as well

	or.nz   r0, r0, _PAGE_DIRTY           ; if Write, set Dirty bit as well

	st_s    r0, [r1]                      ; Write back PTE

	st_s    r0, [r1]                      ; Write back PTE

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