Commit f4dd04a8 authored by Bjorn Andersson's avatar Bjorn Andersson Committed by Andy Gross
Browse files

arm64: dts: qcom: qcs404: Fully describe the CDSP 



Add all the properties needed to describe the CDSP for both the
Trustzone and non-Trustzone based remoteproc case, allowing any child
devices to be described once by just overriding the compatible to match
the firmware available on the board.

Reviewed-by: default avatarVinod Koul <vkoul@kernel.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: default avatarAndy Gross <agross@kernel.org>
parent 560ad5e7

arch/arm64/boot/dts/qcom/qcs404.dtsi

+51 −31
Original line number Diff line number Diff line
@@ -131,37 +131,6 @@ 
		};

	};



	remoteproc_cdsp: remoteproc-cdsp {

		compatible = "qcom,qcs404-cdsp-pas";



		interrupts-extended = <&intc GIC_SPI 229 IRQ_TYPE_EDGE_RISING>,

				      <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,

				      <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,

				      <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,

				      <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;

		interrupt-names = "wdog", "fatal", "ready",

				  "handover", "stop-ack";



		clocks = <&xo_board>;

		clock-names = "xo";



		memory-region = <&cdsp_fw_mem>;



		qcom,smem-states = <&cdsp_smp2p_out 0>;

		qcom,smem-state-names = "stop";



		status = "disabled";



		glink-edge {

			interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>;



			qcom,remote-pid = <5>;

			mboxes = <&apcs_glb 12>;



			label = "cdsp";

		};

	};



	remoteproc_wcss: remoteproc-wcss {

		compatible = "qcom,qcs404-wcss-pas";
@@ -296,6 +265,57 @@ 
			clock-names = "core";

		};



		remoteproc_cdsp: remoteproc@b00000 {

			compatible = "qcom,qcs404-cdsp-pas";

			reg = <0x00b00000 0x4040>;



			interrupts-extended = <&intc GIC_SPI 229 IRQ_TYPE_EDGE_RISING>,

					      <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,

					      <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,

					      <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,

					      <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;

			interrupt-names = "wdog", "fatal", "ready",

					  "handover", "stop-ack";



			clocks = <&xo_board>,

				 <&gcc GCC_CDSP_CFG_AHB_CLK>,

				 <&gcc GCC_CDSP_TBU_CLK>,

				 <&gcc GCC_BIMC_CDSP_CLK>,

				 <&turingcc TURING_WRAPPER_AON_CLK>,

				 <&turingcc TURING_Q6SS_AHBS_AON_CLK>,

				 <&turingcc TURING_Q6SS_AHBM_AON_CLK>,

				 <&turingcc TURING_Q6SS_Q6_AXIM_CLK>;

			clock-names = "xo",

				      "sway",

				      "tbu",

				      "bimc",

				      "ahb_aon",

				      "q6ss_slave",

				      "q6ss_master",

				      "q6_axim";



			resets = <&gcc GCC_CDSP_RESTART>;

			reset-names = "restart";



			qcom,halt-regs = <&tcsr 0x19004>;



			memory-region = <&cdsp_fw_mem>;



			qcom,smem-states = <&cdsp_smp2p_out 0>;

			qcom,smem-state-names = "stop";



			status = "disabled";



			glink-edge {

				interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>;



				qcom,remote-pid = <5>;

				mboxes = <&apcs_glb 12>;



				label = "cdsp";

			};

		};



		tlmm: pinctrl@1000000 {

			compatible = "qcom,qcs404-pinctrl";

			reg = <0x01000000 0x200000>,

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