Commit f4bee1bb authored by Barry Song's avatar Barry Song Committed by Mark Brown
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ASoC: soc-cache: let reg be AND'ed by 0xff instead of data buffer for 8_8 mode



The registers for AD193X are defined as 0x800-0x810 for spi which uses
16_8 mode, for i2c to support AD1937, we will use 8_8 mode, only the low
byte of 0x800-0x810 is valid.  The patch will not destory other codecs,
but make soc cache interface more useful.

Signed-off-by: default avatarBarry Song <barry.song@analog.com>
Acked-by: default avatarLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent 85dfcdff
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+3 −1
Original line number Diff line number Diff line
@@ -159,7 +159,8 @@ static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,

	BUG_ON(codec->volatile_register);

	data[0] = reg & 0xff;
	reg &= 0xff;
	data[0] = reg;
	data[1] = value & 0xff;

	if (reg < codec->reg_cache_size)
@@ -180,6 +181,7 @@ static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
				     unsigned int reg)
{
	u8 *cache = codec->reg_cache;
	reg &= 0xff;
	if (reg >= codec->reg_cache_size)
		return -1;
	return cache[reg];