Merge drm/drm-next into drm-intel-next-queued (f42fb231) · Commits · 戴 / test

Documentation/devicetree/bindings/display/bridge/renesas,lvds.txt

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		@@ -8,6 +8,7 @@ Required properties:

		- compatible : Shall contain one of
		- "renesas,r8a7743-lvds" for R8A7743 (RZ/G1M) compatible LVDS encoders
		- "renesas,r8a774c0-lvds" for R8A774C0 (RZ/G2E) compatible LVDS encoders
		- "renesas,r8a7790-lvds" for R8A7790 (R-Car H2) compatible LVDS encoders
		- "renesas,r8a7791-lvds" for R8A7791 (R-Car M2-W) compatible LVDS encoders
		- "renesas,r8a7793-lvds" for R8A7793 (R-Car M2-N) compatible LVDS encoders
		@@ -25,7 +26,7 @@ Required properties:
		- clock-names: Name of the clocks. This property is model-dependent.
		- The functional clock, which mandatory for all models, shall be listed
		first, and shall be named "fck".
		- On R8A77990 and R8A77995, the LVDS encoder can use the EXTAL or
		- On R8A77990, R8A77995 and R8A774C0, the LVDS encoder can use the EXTAL or
		DU_DOTCLKINx clocks. Those clocks are optional. When supplied they must be
		named "extal" and "dclkin.x" respectively, with "x" being the DU_DOTCLKIN
		numerical index.

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File moved.

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		@@ -7,6 +7,7 @@ Required Properties:
		- "renesas,du-r8a7744" for R8A7744 (RZ/G1N) compatible DU
		- "renesas,du-r8a7745" for R8A7745 (RZ/G1E) compatible DU
		- "renesas,du-r8a77470" for R8A77470 (RZ/G1C) compatible DU
		- "renesas,du-r8a774c0" for R8A774C0 (RZ/G2E) compatible DU
		- "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
		- "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
		- "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU
		@@ -57,6 +58,7 @@ corresponding to each DU output.
		R8A7744 (RZ/G1N) DPAD 0 LVDS 0 - -
		R8A7745 (RZ/G1E) DPAD 0 DPAD 1 - -
		R8A77470 (RZ/G1C) DPAD 0 DPAD 1 LVDS 0 -
		R8A774C0 (RZ/G2E) DPAD 0 LVDS 0 LVDS 1 -
		R8A7779 (R-Car H1) DPAD 0 DPAD 1 - -
		R8A7790 (R-Car H2) DPAD 0 LVDS 0 LVDS 1 -
		R8A7791 (R-Car M2-W) DPAD 0 LVDS 0 - -

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		digraph T {
		/* Make sure our payloads are always drawn below the driver node */
		subgraph cluster_driver {
		fillcolor = grey;
		style = filled;
		driver -> {payload1, payload2} [dir=none];
		}

		/* Driver malloc references */
		edge [style=dashed];
		driver -> port1;
		driver -> port2;
		driver -> port3:e;
		driver -> port4;

		payload1:s -> port1:e;
		payload2:s -> port3:e;
		edge [style=""];

		subgraph cluster_topology {
		label="Topology Manager";
		labelloc=bottom;

		/* Topology references */
		mstb1 -> {port1, port2};
		port1 -> mstb2;
		port2 -> mstb3 -> {port3, port4};
		port3 -> mstb4;

		/* Malloc references */
		edge [style=dashed;dir=back];
		mstb1 -> {port1, port2};
		port1 -> mstb2;
		port2 -> mstb3 -> {port3, port4};
		port3 -> mstb4;
		}

		driver [label="DRM driver";style=filled;shape=box;fillcolor=lightblue];

		payload1 [label="Payload #1";style=filled;shape=box;fillcolor=lightblue];
		payload2 [label="Payload #2";style=filled;shape=box;fillcolor=lightblue];

		mstb1 [label="MSTB #1";style=filled;fillcolor=palegreen;shape=oval];
		mstb2 [label="MSTB #2";style=filled;fillcolor=palegreen;shape=oval];
		mstb3 [label="MSTB #3";style=filled;fillcolor=palegreen;shape=oval];
		mstb4 [label="MSTB #4";style=filled;fillcolor=palegreen;shape=oval];

		port1 [label="Port #1";shape=oval];
		port2 [label="Port #2";shape=oval];
		port3 [label="Port #3";shape=oval];
		port4 [label="Port #4";shape=oval];
		}