Commit f4181092 authored by Linus Walleij's avatar Linus Walleij Committed by Lee Jones
Browse files

mfd: dbx500-prcmu: Drop set_display_clocks()



The display clocks are handled by the generic clock framework
since ages, this code is completely unused and misleading.
Delete it.

Cc: Stephan Gerhold <stephan@gerhold.net>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
parent cb7a374a
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+0 −30
Original line number Diff line number Diff line
@@ -555,14 +555,6 @@ static struct dsiescclk dsiescclk[3] = {
#define PRCMU_CLK_38_SRC		(1 << 10)
#define PRCMU_CLK_38_DIV		(1 << 11)

/* PLLDIV=12, PLLSW=4 (PLLDDR) */
#define PRCMU_DSI_CLOCK_SETTING		0x0000008C

/* DPI 50000000 Hz */
#define PRCMU_DPI_CLOCK_SETTING		((1 << PRCMU_CLK_PLL_SW_SHIFT) | \
					  (16 << PRCMU_CLK_PLL_DIV_SHIFT))
#define PRCMU_DSI_LP_CLOCK_SETTING	0x00000E00

/* D=101, N=1, R=4, SELDIV2=0 */
#define PRCMU_PLLDSI_FREQ_SETTING	0x00040165

@@ -616,28 +608,6 @@ int db8500_prcmu_disable_dsipll(void)
	return 0;
}

int db8500_prcmu_set_display_clocks(void)
{
	unsigned long flags;

	spin_lock_irqsave(&clk_mgt_lock, flags);

	/* Grab the HW semaphore. */
	while ((readl(PRCM_SEM) & PRCM_SEM_PRCM_SEM) != 0)
		cpu_relax();

	writel(PRCMU_DSI_CLOCK_SETTING, prcmu_base + PRCM_HDMICLK_MGT);
	writel(PRCMU_DSI_LP_CLOCK_SETTING, prcmu_base + PRCM_TVCLK_MGT);
	writel(PRCMU_DPI_CLOCK_SETTING, prcmu_base + PRCM_LCDCLK_MGT);

	/* Release the HW semaphore. */
	writel(0, PRCM_SEM);

	spin_unlock_irqrestore(&clk_mgt_lock, flags);

	return 0;
}

u32 db8500_prcmu_read(unsigned int reg)
{
	return readl(prcmu_base + reg);
+0 −6
Original line number Diff line number Diff line
@@ -525,7 +525,6 @@ u8 db8500_prcmu_get_power_state_result(void);
void db8500_prcmu_enable_wakeups(u32 wakeups);
int db8500_prcmu_set_epod(u16 epod_id, u8 epod_state);
int db8500_prcmu_request_clock(u8 clock, bool enable);
int db8500_prcmu_set_display_clocks(void);
int db8500_prcmu_disable_dsipll(void);
int db8500_prcmu_enable_dsipll(void);
void db8500_prcmu_config_abb_event_readout(u32 abb_events);
@@ -682,11 +681,6 @@ static inline int db8500_prcmu_request_clock(u8 clock, bool enable)
	return 0;
}

static inline int db8500_prcmu_set_display_clocks(void)
{
	return 0;
}

static inline int db8500_prcmu_disable_dsipll(void)
{
	return 0;
+0 −10
Original line number Diff line number Diff line
@@ -321,11 +321,6 @@ static inline bool prcmu_is_ac_wake_requested(void)
	return db8500_prcmu_is_ac_wake_requested();
}

static inline int prcmu_set_display_clocks(void)
{
	return db8500_prcmu_set_display_clocks();
}

static inline int prcmu_disable_dsipll(void)
{
	return db8500_prcmu_disable_dsipll();
@@ -511,11 +506,6 @@ static inline bool prcmu_is_ac_wake_requested(void)
	return false;
}

static inline int prcmu_set_display_clocks(void)
{
	return 0;
}

static inline int prcmu_disable_dsipll(void)
{
	return 0;