Commit f3fe412b authored by Ido Schimmel's avatar Ido Schimmel Committed by David S. Miller
Browse files

mlxsw: spectrum: Do not rely on machine endianness 



The second commit cited below performed a cast of 'u32 buffsize' to
'(u16 *)' when calling mlxsw_sp_port_headroom_8x_adjust():

mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, (u16 *) &buffsize);

Colin noted that this will behave differently on big endian
architectures compared to little endian architectures.

Fix this by following Colin's suggestion and have the function accept
and return 'u32' instead of passing the current size by reference.

Fixes: da382875 ("mlxsw: spectrum: Extend to support Spectrum-3 ASIC")
Fixes: 60833d54 ("mlxsw: spectrum: Adjust headroom buffers for 8x ports")
Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
Reported-by: default avatarColin Ian King <colin.king@canonical.com>
Suggested-by: default avatarColin Ian King <colin.king@canonical.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6d61f483

drivers/net/ethernet/mellanox/mlxsw/spectrum.c

+2 −2
Original line number Diff line number Diff line
@@ -978,10 +978,10 @@ int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu, 


		lossy = !(pfc || pause_en);

		thres_cells = mlxsw_sp_pg_buf_threshold_get(mlxsw_sp, mtu);

		mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, &thres_cells);

		thres_cells = mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, thres_cells);

		delay_cells = mlxsw_sp_pg_buf_delay_get(mlxsw_sp, mtu, delay,

							pfc, pause_en);

		mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, &delay_cells);

		delay_cells = mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, delay_cells);

		total_cells = thres_cells + delay_cells;



		taken_headroom_cells += total_cells;

drivers/net/ethernet/mellanox/mlxsw/spectrum.h

+3 −5
Original line number Diff line number Diff line
@@ -374,17 +374,15 @@ mlxsw_sp_port_vlan_find_by_vid(const struct mlxsw_sp_port *mlxsw_sp_port, 
	return NULL;

}



static inline void

static inline u32

mlxsw_sp_port_headroom_8x_adjust(const struct mlxsw_sp_port *mlxsw_sp_port,

				 u16 *p_size)

				 u32 size_cells)

{

	/* Ports with eight lanes use two headroom buffers between which the

	 * configured headroom size is split. Therefore, multiply the calculated

	 * headroom size by two.

	 */

	if (mlxsw_sp_port->mapping.width != 8)

		return;

	*p_size *= 2;

	return mlxsw_sp_port->mapping.width == 8 ? 2 * size_cells : size_cells;

}



enum mlxsw_sp_flood_type {

drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c

+1 −1
Original line number Diff line number Diff line
@@ -312,7 +312,7 @@ static int mlxsw_sp_port_pb_init(struct mlxsw_sp_port *mlxsw_sp_port) 


		if (i == MLXSW_SP_PB_UNUSED)

			continue;

		mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, &size);

		size = mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, size);

		mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, i, size);

	}

	mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl,

drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c

+1 −1
Original line number Diff line number Diff line
@@ -782,7 +782,7 @@ mlxsw_sp_span_port_buffer_update(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu) 
		speed = 0;



	buffsize = mlxsw_sp_span_buffsize_get(mlxsw_sp, speed, mtu);

	mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, (u16 *) &buffsize);

	buffsize = mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, buffsize);

	mlxsw_reg_sbib_pack(sbib_pl, mlxsw_sp_port->local_port, buffsize);

	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);

}

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