Commit f3867f43 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/clk: rename from clock (no binary change) 



Rename to match the Linux subsystem responsible for the same kind of
things.  Will be investigating how feasible it will be to expose the
GPU clock trees with it at some point.

The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent c39f472e

drivers/gpu/drm/nouveau/dispnv04/crtc.c

+2 −2
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ 
#include "disp.h"



#include <subdev/bios/pll.h>

#include <subdev/clock.h>

#include <subdev/clk.h>



static int

nv04_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
@@ -113,7 +113,7 @@ static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mod 
	struct drm_device *dev = crtc->dev;

	struct nouveau_drm *drm = nouveau_drm(dev);

	struct nouveau_bios *bios = nvkm_bios(&drm->device);

	struct nouveau_clock *clk = nvkm_clock(&drm->device);

	struct nouveau_clk *clk = nvkm_clk(&drm->device);

	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

	struct nv04_mode_state *state = &nv04_display(dev)->mode_reg;

	struct nv04_crtc_reg *regp = &state->crtc_reg[nv_crtc->index];

drivers/gpu/drm/nouveau/dispnv04/hw.c

+2 −2
Original line number Diff line number Diff line
@@ -253,7 +253,7 @@ nouveau_hw_fix_bad_vpll(struct drm_device *dev, int head) 


	struct nouveau_drm *drm = nouveau_drm(dev);

	struct nvif_device *device = &drm->device;

	struct nouveau_clock *clk = nvkm_clock(device);

	struct nouveau_clk *clk = nvkm_clk(device);

	struct nouveau_bios *bios = nvkm_bios(device);

	struct nvbios_pll pll_lim;

	struct nouveau_pll_vals pv;
@@ -463,7 +463,7 @@ nv_load_state_ramdac(struct drm_device *dev, int head, 
		     struct nv04_mode_state *state)

{

	struct nouveau_drm *drm = nouveau_drm(dev);

	struct nouveau_clock *clk = nvkm_clock(&drm->device);

	struct nouveau_clk *clk = nvkm_clk(&drm->device);

	struct nv04_crtc_reg *regp = &state->crtc_reg[head];

	uint32_t pllreg = head ? NV_RAMDAC_VPLL2 : NV_PRAMDAC_VPLL_COEFF;

	int i;

drivers/gpu/drm/nouveau/include/nvif/device.h

+2 −2
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ void nvif_device_ref(struct nvif_device *, struct nvif_device **); 
#include <subdev/vm.h>

#include <subdev/bar.h>

#include <subdev/gpio.h>

#include <subdev/clock.h>

#include <subdev/clk.h>

#include <subdev/i2c.h>

#include <subdev/timer.h>

#include <subdev/therm.h>
@@ -43,7 +43,7 @@ void nvif_device_ref(struct nvif_device *, struct nvif_device **); 
#define nvkm_vmmgr(a) nouveau_vmmgr(nvkm_device(a))

#define nvkm_bar(a) nouveau_bar(nvkm_device(a))

#define nvkm_gpio(a) nouveau_gpio(nvkm_device(a))

#define nvkm_clock(a) nouveau_clock(nvkm_device(a))

#define nvkm_clk(a) nouveau_clk(nvkm_device(a))

#define nvkm_i2c(a) nouveau_i2c(nvkm_device(a))

#define nvkm_timer(a) nouveau_timer(nvkm_device(a))

#define nvkm_wait(a,b,c,d) nv_wait(nvkm_timer(a), (b), (c), (d))

drivers/gpu/drm/nouveau/include/nvkm/core/device.h

+1 −1
Original line number Diff line number Diff line
@@ -38,7 +38,7 @@ enum nv_subdev_type { 
	NVDEV_SUBDEV_PWR,

	NVDEV_SUBDEV_VOLT,

	NVDEV_SUBDEV_THERM,

	NVDEV_SUBDEV_CLOCK,

	NVDEV_SUBDEV_CLK,



	NVDEV_ENGINE_FIRST,

	NVDEV_ENGINE_DMAOBJ = NVDEV_ENGINE_FIRST,

drivers/gpu/drm/nouveau/include/nvkm/subdev/clock.h→drivers/gpu/drm/nouveau/include/nvkm/subdev/clk.h

+166 −0
Original line number Diff line number Diff line 
#ifndef __NOUVEAU_CLOCK_H__

#define __NOUVEAU_CLOCK_H__

#ifndef __NOUVEAU_CLK_H__

#define __NOUVEAU_CLK_H__



#include <core/device.h>

#include <core/subdev.h>
@@ -63,10 +63,10 @@ struct nouveau_pstate { 
	u8 fanspeed;

};



struct nouveau_clock {

struct nouveau_clk {

	struct nouveau_subdev base;



	struct nouveau_clocks *domains;

	struct nouveau_domain *domains;

	struct nouveau_pstate bstate;



	struct list_head states;
@@ -87,27 +87,27 @@ struct nouveau_clock { 


	bool allow_reclock;



	int  (*read)(struct nouveau_clock *, enum nv_clk_src);

	int  (*calc)(struct nouveau_clock *, struct nouveau_cstate *);

	int  (*prog)(struct nouveau_clock *);

	void (*tidy)(struct nouveau_clock *);

	int  (*read)(struct nouveau_clk *, enum nv_clk_src);

	int  (*calc)(struct nouveau_clk *, struct nouveau_cstate *);

	int  (*prog)(struct nouveau_clk *);

	void (*tidy)(struct nouveau_clk *);



	/*XXX: die, these are here *only* to support the completely

	 *     bat-shit insane what-was-nouveau_hw.c code

	 */

	int (*pll_calc)(struct nouveau_clock *, struct nvbios_pll *,

	int (*pll_calc)(struct nouveau_clk *, struct nvbios_pll *,

			int clk, struct nouveau_pll_vals *pv);

	int (*pll_prog)(struct nouveau_clock *, u32 reg1,

	int (*pll_prog)(struct nouveau_clk *, u32 reg1,

			struct nouveau_pll_vals *pv);

};



static inline struct nouveau_clock *

nouveau_clock(void *obj)

static inline struct nouveau_clk *

nouveau_clk(void *obj)

{

	return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_CLOCK);

	return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_CLK);

}



struct nouveau_clocks {

struct nouveau_domain {

	enum nv_clk_src name;

	u8 bios; /* 0xff for none */

#define NVKM_CLK_DOM_FLAG_CORE 0x01
@@ -116,51 +116,51 @@ struct nouveau_clocks { 
	int mdiv;

};



#define nouveau_clock_create(p,e,o,i,r,s,n,d)                                  \

	nouveau_clock_create_((p), (e), (o), (i), (r), (s), (n), sizeof(**d),  \

#define nouveau_clk_create(p,e,o,i,r,s,n,d)                                  \

	nouveau_clk_create_((p), (e), (o), (i), (r), (s), (n), sizeof(**d),  \

			      (void **)d)

#define nouveau_clock_destroy(p) ({                                            \

	struct nouveau_clock *clk = (p);                                       \

	_nouveau_clock_dtor(nv_object(clk));                                   \

#define nouveau_clk_destroy(p) ({                                            \

	struct nouveau_clk *clk = (p);                                       \

	_nouveau_clk_dtor(nv_object(clk));                                   \

})

#define nouveau_clock_init(p) ({                                               \

	struct nouveau_clock *clk = (p);                                       \

	_nouveau_clock_init(nv_object(clk));                                   \

#define nouveau_clk_init(p) ({                                               \

	struct nouveau_clk *clk = (p);                                       \

	_nouveau_clk_init(nv_object(clk));                                   \

})

#define nouveau_clock_fini(p,s) ({                                             \

	struct nouveau_clock *clk = (p);                                       \

	_nouveau_clock_fini(nv_object(clk), (s));                              \

#define nouveau_clk_fini(p,s) ({                                             \

	struct nouveau_clk *clk = (p);                                       \

	_nouveau_clk_fini(nv_object(clk), (s));                              \

})



int  nouveau_clock_create_(struct nouveau_object *, struct nouveau_object *,

int  nouveau_clk_create_(struct nouveau_object *, struct nouveau_object *,

			   struct nouveau_oclass *,

			   struct nouveau_clocks *, struct nouveau_pstate *,

			   struct nouveau_domain *, struct nouveau_pstate *,

			   int, bool, int, void **);

void _nouveau_clock_dtor(struct nouveau_object *);

int  _nouveau_clock_init(struct nouveau_object *);

int  _nouveau_clock_fini(struct nouveau_object *, bool);



extern struct nouveau_oclass nv04_clock_oclass;

extern struct nouveau_oclass nv40_clock_oclass;

extern struct nouveau_oclass *nv50_clock_oclass;

extern struct nouveau_oclass *nv84_clock_oclass;

extern struct nouveau_oclass *nvaa_clock_oclass;

extern struct nouveau_oclass nva3_clock_oclass;

extern struct nouveau_oclass nvc0_clock_oclass;

extern struct nouveau_oclass nve0_clock_oclass;

extern struct nouveau_oclass gk20a_clock_oclass;



int nv04_clock_pll_set(struct nouveau_clock *, u32 type, u32 freq);

int nv04_clock_pll_calc(struct nouveau_clock *, struct nvbios_pll *,

void _nouveau_clk_dtor(struct nouveau_object *);

int  _nouveau_clk_init(struct nouveau_object *);

int  _nouveau_clk_fini(struct nouveau_object *, bool);



extern struct nouveau_oclass nv04_clk_oclass;

extern struct nouveau_oclass nv40_clk_oclass;

extern struct nouveau_oclass *nv50_clk_oclass;

extern struct nouveau_oclass *nv84_clk_oclass;

extern struct nouveau_oclass *nvaa_clk_oclass;

extern struct nouveau_oclass nva3_clk_oclass;

extern struct nouveau_oclass nvc0_clk_oclass;

extern struct nouveau_oclass nve0_clk_oclass;

extern struct nouveau_oclass gk20a_clk_oclass;



int nv04_clk_pll_set(struct nouveau_clk *, u32 type, u32 freq);

int nv04_clk_pll_calc(struct nouveau_clk *, struct nvbios_pll *,

			int clk, struct nouveau_pll_vals *);

int nv04_clock_pll_prog(struct nouveau_clock *, u32 reg1,

int nv04_clk_pll_prog(struct nouveau_clk *, u32 reg1,

			struct nouveau_pll_vals *);

int nva3_clock_pll_calc(struct nouveau_clock *, struct nvbios_pll *,

int nva3_clk_pll_calc(struct nouveau_clk *, struct nvbios_pll *,

			int clk, struct nouveau_pll_vals *);



int nouveau_clock_ustate(struct nouveau_clock *, int req, int pwr);

int nouveau_clock_astate(struct nouveau_clock *, int req, int rel, bool wait);

int nouveau_clock_dstate(struct nouveau_clock *, int req, int rel);

int nouveau_clock_tstate(struct nouveau_clock *, int req, int rel);

int nouveau_clk_ustate(struct nouveau_clk *, int req, int pwr);

int nouveau_clk_astate(struct nouveau_clk *, int req, int rel, bool wait);

int nouveau_clk_dstate(struct nouveau_clk *, int req, int rel);

int nouveau_clk_tstate(struct nouveau_clk *, int req, int rel);



#endif

CRA Git | Maintained and supported by SUSTech CRA and CCSE