clk: composite: allow fixed rates & fixed dividers (f363e215) · Commits · 戴 / test

The composite clock assumes that any clock implementing the .recalc_rate callback will also implement .round_rate and .set_rate. This is not always true; the basic fixed-rate clock will only implement .recalc_rate and a fixed-divider clock may choose to implement .recalc_rate and .round_rate but not .set_rate. Fix this by conditionally registering .round_rate and .set_rate callbacks based on the rate_ops passed in to clk_composite_register. Signed-off-by:

Mike Turquette <mturquette@linaro.org> Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Tested-by:

Emilio López <emilio@elopez.com.ar> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>

drivers/clk/clk-composite.c

+13 −4

Original line number	Diff line number	Diff line
		@@ -150,17 +150,26 @@ struct clk clk_register_composite(struct device dev, const char *name,
		}

		if (rate_hw && rate_ops) {
		if (!rate_ops->recalc_rate \|\| !rate_ops->round_rate \|\|
		!rate_ops->set_rate) {
		if (!rate_ops->recalc_rate) {
		clk = ERR_PTR(-EINVAL);
		goto err;
		}

		/* .round_rate is a prerequisite for .set_rate */
		if (rate_ops->round_rate) {
		clk_composite_ops->round_rate = clk_composite_round_rate;
		if (rate_ops->set_rate) {
		clk_composite_ops->set_rate = clk_composite_set_rate;
		}
		} else {
		WARN(rate_ops->set_rate,
		"%s: missing round_rate op is required\n",
		__func__);
		}

		composite->rate_hw = rate_hw;
		composite->rate_ops = rate_ops;
		clk_composite_ops->recalc_rate = clk_composite_recalc_rate;
		clk_composite_ops->round_rate = clk_composite_round_rate;
		clk_composite_ops->set_rate = clk_composite_set_rate;
		}

		if (gate_hw && gate_ops) {

Admin message