Commit f32f116b authored by Arend van Spriel's avatar Arend van Spriel Committed by Greg Kroah-Hartman
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staging: brcm80211: convert endianess before handling the frame 



The received frame from the device is in little-endian order and
converted in the receive path. However, the phy code was doing
the rssi calculation with packet in LE order. This has been changed
to do the le_to_cpu conversion before doing the rssi computation
and further receive processing.

Reviewed-by: default avatarRoland Vossen <rvossen@broadcom.com>
Reviewed-by: default avatarPieter-Paul Giesberts <pieterpg@broadcom.com>
Signed-off-by: default avatarFranky Lin <frankyl@broadcom.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent e053edb6

drivers/staging/brcm80211/brcmsmac/main.c

+13 −14
Original line number Diff line number Diff line
@@ -813,11 +813,23 @@ brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound) 
		wlc_rxhdr = (struct brcms_d11rxhdr *) p->data;

		rxh = (struct d11rxhdr *)p->data;



		/* fixup rx header endianness */

		rxh->RxFrameSize = le16_to_cpu(rxh->RxFrameSize);

		rxh->PhyRxStatus_0 = le16_to_cpu(rxh->PhyRxStatus_0);

		rxh->PhyRxStatus_1 = le16_to_cpu(rxh->PhyRxStatus_1);

		rxh->PhyRxStatus_2 = le16_to_cpu(rxh->PhyRxStatus_2);

		rxh->PhyRxStatus_3 = le16_to_cpu(rxh->PhyRxStatus_3);

		rxh->PhyRxStatus_4 = le16_to_cpu(rxh->PhyRxStatus_4);

		rxh->PhyRxStatus_5 = le16_to_cpu(rxh->PhyRxStatus_5);

		rxh->RxStatus1 = le16_to_cpu(rxh->RxStatus1);

		rxh->RxStatus2 = le16_to_cpu(rxh->RxStatus2);

		rxh->RxTSFTime = le16_to_cpu(rxh->RxTSFTime);

		rxh->RxChan = le16_to_cpu(rxh->RxChan);



		/*

		 * compute the RSSI from d11rxhdr and record it in wlc_rxd11hr

		 */

		wlc_rxhdr->rssi = wlc_phy_rssi_compute(wlc_hw->band->pi, rxh);



		brcms_c_recv(wlc_hw->wlc, p);

	}
@@ -8289,19 +8301,6 @@ void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p) 
	/* strip off rxhdr */

	skb_pull(p, BRCMS_HWRXOFF);



	/* fixup rx header endianness */

	rxh->RxFrameSize = le16_to_cpu(rxh->RxFrameSize);

	rxh->PhyRxStatus_0 = le16_to_cpu(rxh->PhyRxStatus_0);

	rxh->PhyRxStatus_1 = le16_to_cpu(rxh->PhyRxStatus_1);

	rxh->PhyRxStatus_2 = le16_to_cpu(rxh->PhyRxStatus_2);

	rxh->PhyRxStatus_3 = le16_to_cpu(rxh->PhyRxStatus_3);

	rxh->PhyRxStatus_4 = le16_to_cpu(rxh->PhyRxStatus_4);

	rxh->PhyRxStatus_5 = le16_to_cpu(rxh->PhyRxStatus_5);

	rxh->RxStatus1 = le16_to_cpu(rxh->RxStatus1);

	rxh->RxStatus2 = le16_to_cpu(rxh->RxStatus2);

	rxh->RxTSFTime = le16_to_cpu(rxh->RxTSFTime);

	rxh->RxChan = le16_to_cpu(rxh->RxChan);



	/* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */

	if (rxh->RxStatus1 & RXS_PBPRES) {

		if (p->len < 2) {

drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c

+3 −3
Original line number Diff line number Diff line
@@ -2613,18 +2613,18 @@ void wlc_phy_compute_dB(u32 *cmplx_pwr, s8 *p_cmplx_pwr_dB, u8 core) 
int wlc_phy_rssi_compute(struct brcms_phy_pub *pih,

			 struct d11rxhdr *rxh)

{

	int rssi = le16_to_cpu(rxh->PhyRxStatus_1) & PRXS1_JSSI_MASK;

	int rssi = rxh->PhyRxStatus_1 & PRXS1_JSSI_MASK;

	uint radioid = pih->radioid;

	struct brcms_phy *pi = (struct brcms_phy *) pih;



	if ((pi->sh->corerev >= 11)

	    && !(le16_to_cpu(rxh->RxStatus2) & RXS_PHYRXST_VALID)) {

	    && !(rxh->RxStatus2 & RXS_PHYRXST_VALID)) {

		rssi = BRCMS_RSSI_INVALID;

		goto end;

	}



	if (ISLCNPHY(pi)) {

		u8 gidx = (le16_to_cpu(rxh->PhyRxStatus_2) & 0xFC00) >> 10;

		u8 gidx = (rxh->PhyRxStatus_2 & 0xFC00) >> 10;

		struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy;



		if (rssi > 127)

drivers/staging/brcm80211/brcmsmac/phy/phy_n.c

+4 −4
Original line number Diff line number Diff line
@@ -23115,16 +23115,16 @@ wlc_phy_rssi_compute_nphy(struct brcms_phy *pi, struct d11rxhdr *rxh) 
	s16 phyRx0_l, phyRx2_l;









	rxpwr = 0;









	rxpwr0 = le16_to_cpu(rxh->PhyRxStatus_1) & PRXS1_nphy_PWR0_MASK;









	rxpwr1 = (le16_to_cpu(rxh->PhyRxStatus_1) & PRXS1_nphy_PWR1_MASK) >> 8;









	rxpwr0 = rxh->PhyRxStatus_1 & PRXS1_nphy_PWR0_MASK;









	rxpwr1 = (rxh->PhyRxStatus_1 & PRXS1_nphy_PWR1_MASK) >> 8;

















	if (rxpwr0 > 127)









		rxpwr0 -= 256;









	if (rxpwr1 > 127)









		rxpwr1 -= 256;

















	phyRx0_l = le16_to_cpu(rxh->PhyRxStatus_0) & 0x00ff;









	phyRx2_l = le16_to_cpu(rxh->PhyRxStatus_2) & 0x00ff;









	phyRx0_l = rxh->PhyRxStatus_0 & 0x00ff;









	phyRx2_l = rxh->PhyRxStatus_2 & 0x00ff;









	if (phyRx2_l > 127)









		phyRx2_l -= 256;



































































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