Commit f31d12af authored by Archit Taneja's avatar Archit Taneja Committed by Rob Clark
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dt-bindings: msm/hdmi: Add HDMI PHY bindings 



Add HDMI PHY bindings. Update the example to use HDMI PHY.

Added a missing power-domains property in the HDMI core bindings. Also,
simplified HDMI TX's DT node name in the example.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring <robh@kernel.org>

Signed-off-by: default avatarArchit Taneja <architt@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
parent e17afdce

Documentation/devicetree/bindings/display/msm/hdmi.txt

+44 −2
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ Required properties: 
- reg: Physical base address and length of the controller's registers

- reg-names: "core_physical"

- interrupts: The interrupt signal from the hdmi block.

- power-domains: Should be <&mmcc MDSS_GDSC>.

- clocks: device clocks

  See ../clocks/clock-bindings.txt for details.

- qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin
@@ -18,6 +19,8 @@ Required properties: 
- qcom,hdmi-tx-hpd-gpio: hpd pin

- core-vdda-supply: phandle to supply regulator

- hdmi-mux-supply: phandle to mux regulator

- phys: the phandle for the HDMI PHY device

- phy-names: the name of the corresponding PHY device



Optional properties:

- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
@@ -27,15 +30,38 @@ Optional properties: 
- pinctrl-0: the default pinctrl state (active)

- pinctrl-1: the "sleep" pinctrl state



HDMI PHY:

Required properties:

- compatible: Could be the following

  * "qcom,hdmi-phy-8660"

  * "qcom,hdmi-phy-8960"

  * "qcom,hdmi-phy-8974"

  * "qcom,hdmi-phy-8084"

  * "qcom,hdmi-phy-8996"

- #phy-cells: Number of cells in a PHY specifier; Should be 0.

- reg: Physical base address and length of the registers of the PHY sub blocks.

- reg-names: The names of register regions. The following regions are required:

  * "hdmi_phy"

  * "hdmi_pll"

  For HDMI PHY on msm8996, these additional register regions are required:

    * "hdmi_tx_l0"

    * "hdmi_tx_l1"

    * "hdmi_tx_l3"

    * "hdmi_tx_l4"

- power-domains: Should be <&mmcc MDSS_GDSC>.

- clocks: device clocks

  See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details.

- core-vdda-supply: phandle to vdda regulator device node



Example:



/ {

	...



	hdmi: qcom,hdmi-tx-8960@4a00000 {

	hdmi: hdmi@4a00000 {

		compatible = "qcom,hdmi-tx-8960";

		reg-names = "core_physical";

		reg = <0x04a00000 0x1000>;

		reg = <0x04a00000 0x2f0>;

		interrupts = <GIC_SPI 79 0>;

		power-domains = <&mmcc MDSS_GDSC>;

		clock-names =
@@ -54,5 +80,21 @@ Example: 
		pinctrl-names = "default", "sleep";

		pinctrl-0 = <&hpd_active  &ddc_active  &cec_active>;

		pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>;



		phys = <&hdmi_phy>;

		phy-names = "hdmi_phy";

	};



	hdmi_phy: phy@4a00400 {

		compatible = "qcom,hdmi-phy-8960";

		reg-names = "hdmi_phy",

			    "hdmi_pll";

		reg = <0x4a00400 0x60>,

		      <0x4a00500 0x100>;

		#phy-cells = <0>;

		power-domains = <&mmcc MDSS_GDSC>;

		clock-names = "slave_iface_clk";

		clocks = <&mmcc HDMI_S_AHB_CLK>;

		core-vdda-supply = <&pm8921_hdmi_mvs>;

	};

};

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