Commit f2e1fbb5 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-fixes-for-linus' of... 

Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86: Flush TLB if PGD entry is changed in i386 PAE mode
  x86, dumpstack: Correct stack dump info when frame pointer is available
  x86: Clean up csum-copy_64.S a bit
  x86: Fix common misspellings
  x86: Fix misspelling and align params
  x86: Use PentiumPro-optimized partial_csum() on VIA C7
parents 508996b6 4981d01e

arch/x86/Kconfig.cpu

+2 −2
Original line number Diff line number Diff line
@@ -326,7 +326,7 @@ config X86_PPRO_FENCE 
	  Old PentiumPro multiprocessor systems had errata that could cause

	  memory operations to violate the x86 ordering standard in rare cases.

	  Enabling this option will attempt to work around some (but not all)

	  occurances of this problem, at the cost of much heavier spinlock and

	  occurrences of this problem, at the cost of much heavier spinlock and

	  memory barrier operations.



	  If unsure, say n here. Even distro kernels should think twice before
@@ -366,7 +366,7 @@ config X86_INTEL_USERCOPY 


config X86_USE_PPRO_CHECKSUM

	def_bool y

	depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM

	depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM



config X86_USE_3DNOW

	def_bool y

arch/x86/crypto/aesni-intel_asm.S

+3 −3
Original line number Diff line number Diff line
@@ -1346,7 +1346,7 @@ _zero_cipher_left_decrypt: 
	and	$15, %r13				# %r13 = arg4 (mod 16)

	je	_multiple_of_16_bytes_decrypt



        # Handle the last <16 byte block seperately

        # Handle the last <16 byte block separately



	paddd ONE(%rip), %xmm0         # increment CNT to get Yn

        movdqa SHUF_MASK(%rip), %xmm10
@@ -1355,7 +1355,7 @@ _zero_cipher_left_decrypt: 
	ENCRYPT_SINGLE_BLOCK  %xmm0, %xmm1    # E(K, Yn)

	sub $16, %r11

	add %r13, %r11

	movdqu (%arg3,%r11,1), %xmm1   # recieve the last <16 byte block

	movdqu (%arg3,%r11,1), %xmm1   # receive the last <16 byte block

	lea SHIFT_MASK+16(%rip), %r12

	sub %r13, %r12

# adjust the shuffle mask pointer to be able to shift 16-%r13 bytes
@@ -1607,7 +1607,7 @@ _zero_cipher_left_encrypt: 
	and	$15, %r13			# %r13 = arg4 (mod 16)

	je	_multiple_of_16_bytes_encrypt



         # Handle the last <16 Byte block seperately

         # Handle the last <16 Byte block separately

	paddd ONE(%rip), %xmm0                # INCR CNT to get Yn

        movdqa SHUF_MASK(%rip), %xmm10

	PSHUFB_XMM %xmm10, %xmm0

arch/x86/include/asm/cacheflush.h

+1 −1
Original line number Diff line number Diff line
@@ -71,7 +71,7 @@ static inline void set_page_memtype(struct page *pg, unsigned long memtype) { } 
 * Read/Write    : ReadOnly, ReadWrite

 * Presence      : NotPresent

 *

 * Within a catagory, the attributes are mutually exclusive.

 * Within a category, the attributes are mutually exclusive.

 *

 * The implementation of this API will take care of various aspects that

 * are associated with changing such attributes, such as:

arch/x86/include/asm/kdebug.h

+1 −1
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ extern void die(const char *, struct pt_regs *,long); 
extern int __must_check __die(const char *, struct pt_regs *, long);

extern void show_registers(struct pt_regs *regs);

extern void show_trace(struct task_struct *t, struct pt_regs *regs,

		       unsigned long *sp);

		       unsigned long *sp, unsigned long bp);

extern void __show_regs(struct pt_regs *regs, int all);

extern void show_regs(struct pt_regs *regs);

extern unsigned long oops_begin(void);

arch/x86/include/asm/nmi.h

+2 −2
Original line number Diff line number Diff line
@@ -29,7 +29,7 @@ void arch_trigger_all_cpu_backtrace(void); 
 * external nmis, because the local ones are more frequent.

 *

 * Also setup some default high/normal/low settings for

 * subsystems to registers with.  Using 4 bits to seperate

 * subsystems to registers with.  Using 4 bits to separate

 * the priorities.  This can go a lot higher if needed be.

 */

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