Commit f2c60ed0 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus 

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (28 commits)
  [MIPS] Rework cobalt_board_id
  [MIPS] Use RTC_CMOS for Cobalt
  [MIPS] Use platform_device for Cobalt UART
  [MIPS] Separate Alchemy processor based boards config
  [MIPS] Fix build error in atomic64_cmpxchg
  [MIPS] Run checksyscalls for N32 and O32 ABI
  [MIPS] tlbex: use __maybe_unused
  [MIPS] excite: use __maybe_unused
  [MIPS] Add extern cobalt_board_id
  [MIPS] Remove unused CONFIG_TOSHIBA_BOARDS
  [MIPS] Rename tb0229_defconfig to tb0219_defconfig
  [MIPS] Update tb0229_defconfig; add CONFIG_GPIO_TB0219.
  [MIPS] Add minimum defconfig for RBHMA4200
  [MIPS] SB1: Build fix.
  [MIPS] Drop __devinit tag from allocate_irqno() and free_irqno()
  [MIPS] clocksource: use CLOCKSOURCE_MASK() macro
  [MIPS] Remove LIMITED_DMA support
  [MIPS] Remove Momenco Jaguar ATX support
  [MIPS] Remove Momenco Ocelot G support
  [MIPS] FPU hazard handling
  ...
parents cabca0cb 3f2d560e

Documentation/mips/pci/pci.README

deleted100644 → 0
+0 −54
Original line number Diff line number Diff line 


Pete Popov, ppopov@pacbell.net

07/11/2001



This README briefly explains how to use the pci and pci_auto

code in arch/mips/kernel.  The code was ported from PowerPC and

modified slightly. It has been tested pretty well on PPC on some

rather complex systems with multiple bridges and devices behind

each bridge. However, at the time this README was written, the

mips port was tested only on boards with a single pci bus and

no P2P bridges.  It's very possible that on boards with P2P

bridges some modifications have to be made. The code will 

evolve, no doubt, but currently every single mips board

is doing its own pcibios thing and it has become a big

mess.  This generic pci code is meant to clean up the mips

pci mess and make it easier to add pci support to new boards.



inside the define for your board in arch/mips/config.in. 

For example, the Galileo EV96100 board  looks like this:



if [ "$CONFIG_MIPS_EV96100" = "y" ]; then

	define_bool CONFIG_PCI y

	define_bool CONFIG_MIPS_GT96100 y

	define_bool CONFIG_NEW_PCI y

	define_bool CONFIG_SWAP_IO_SPACE y

fi 





Next, if you want to use the arch/mips/kernel/pci code, which has the

pcibios_init() function, add



define_bool CONFIG_NEW_PCI y

 

inside the define for your board. Again, the EV96100 example above

show NEW_PCI turned on.





Now you need to add your files to hook in your pci configuration

cycles.  Usually you'll need only a couple of files named something

like pci_fixups.c and pci_ops.c.  You can copy the templates

provided and fill in the code.



The file pci_ops.c should contain the pci configuration cycles routines.

It also has the mips_pci_channels[] array which contains the descriptors

of each pci controller.



The file pci_fixups.c contains a few routines to do interrupt fixups,

resources fixups, and, if needed, pci bios fixups.



Usually you'll put your pci_fixups.c file in your board specific directory, 

since the functions in that file are board specific.  The functions in

pci_ops.c, on the other hand, are usually pci controller specific so that

file could be shared among a few different boards using the same

pci controller.

arch/mips/Kconfig

+10 −202
Original line number Diff line number Diff line
@@ -15,121 +15,8 @@ choice 
	prompt "System type"

	default SGI_IP22



config MIPS_MTX1

	bool "4G Systems MTX-1 board"

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select RESOURCES_64BIT if PCI

	select SOC_AU1500

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_BOSPORUS

	bool "AMD Alchemy Bosporus board"

	select SOC_AU1500

	select DMA_NONCOHERENT

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_PB1000

	bool "AMD Alchemy PB1000 board"

	select SOC_AU1000

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select RESOURCES_64BIT if PCI

	select SWAP_IO_SPACE

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_PB1100

	bool "AMD Alchemy PB1100 board"

	select SOC_AU1100

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select RESOURCES_64BIT if PCI

	select SWAP_IO_SPACE

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_PB1500

	bool "AMD Alchemy PB1500 board"

	select SOC_AU1500

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select RESOURCES_64BIT if PCI

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_PB1550

	bool "AMD Alchemy PB1550 board"

	select SOC_AU1550

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select MIPS_DISABLE_OBSOLETE_IDE

	select RESOURCES_64BIT if PCI

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_PB1200

	bool "AMD Alchemy PB1200 board"

	select SOC_AU1200

	select DMA_NONCOHERENT

	select MIPS_DISABLE_OBSOLETE_IDE

	select RESOURCES_64BIT if PCI

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_DB1000

	bool "AMD Alchemy DB1000 board"

	select SOC_AU1000

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select RESOURCES_64BIT if PCI

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_DB1100

	bool "AMD Alchemy DB1100 board"

	select SOC_AU1100

	select DMA_NONCOHERENT

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_DB1500

	bool "AMD Alchemy DB1500 board"

	select SOC_AU1500

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select MIPS_DISABLE_OBSOLETE_IDE

	select RESOURCES_64BIT if PCI

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_BIG_ENDIAN

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_DB1550

	bool "AMD Alchemy DB1550 board"

	select SOC_AU1550

	select HW_HAS_PCI

	select DMA_NONCOHERENT

	select MIPS_DISABLE_OBSOLETE_IDE

	select RESOURCES_64BIT if PCI

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_DB1200

	bool "AMD Alchemy DB1200 board"

	select SOC_AU1200

	select DMA_COHERENT

	select MIPS_DISABLE_OBSOLETE_IDE

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_MIRAGE

	bool "AMD Alchemy Mirage board"

	select DMA_NONCOHERENT

	select SOC_AU1500

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_LITTLE_ENDIAN

config MACH_ALCHEMY

	bool "Alchemy processor based machines"



config BASLER_EXCITE

	bool "Basler eXcite smart camera"
@@ -369,28 +256,6 @@ config MIPS_SIM 
	  This option enables support for MIPS Technologies MIPSsim software

	  emulator.



config MOMENCO_JAGUAR_ATX

	bool "Momentum Jaguar board"

	select BOOT_ELF32

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select IRQ_CPU

	select IRQ_CPU_RM7K

	select IRQ_MV64340

	select LIMITED_DMA

	select PCI_MARVELL

	select RM7000_CPU_SCACHE

	select SWAP_IO_SPACE

	select SYS_HAS_CPU_RM9000

	select SYS_HAS_EARLY_PRINTK

	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_64BIT_KERNEL

	select SYS_SUPPORTS_BIG_ENDIAN

	select SYS_SUPPORTS_KGDB

	help

	  The Jaguar ATX is a MIPS-based Single Board Computer (SBC) made by

	  Momentum Computer <http://www.momenco.com/>.



config MOMENCO_OCELOT

	bool "Momentum Ocelot board"

	select DMA_NONCOHERENT
@@ -446,29 +311,6 @@ config MOMENCO_OCELOT_C 
	  The Ocelot is a MIPS-based Single Board Computer (SBC) made by

	  Momentum Computer <http://www.momenco.com/>.



config MOMENCO_OCELOT_G

	bool "Momentum Ocelot-G board"

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select IRQ_CPU

	select IRQ_CPU_RM7K

	select PCI_MARVELL

	select RM7000_CPU_SCACHE

	select SWAP_IO_SPACE

	select SYS_HAS_CPU_RM7000

	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN

	select SYS_SUPPORTS_BIG_ENDIAN

	help

	  The Ocelot is a MIPS-based Single Board Computer (SBC) made by

	  Momentum Computer <http://www.momenco.com/>.



config MIPS_XXS1500

	bool "MyCable XXS1500 board"

	select DMA_NONCOHERENT

	select SOC_AU1500

	select SYS_SUPPORTS_LITTLE_ENDIAN



config PNX8550_JBS

	bool "Philips PNX8550 based JBS board"

	select PNX8550
@@ -775,7 +617,6 @@ config TOSHIBA_JMR3927 
	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_SUPPORTS_BIG_ENDIAN

	select TOSHIBA_BOARDS

	select GENERIC_HARDIRQS_NO__DO_IRQ



config TOSHIBA_RBTX4927
@@ -791,7 +632,6 @@ config TOSHIBA_RBTX4927 
	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_SUPPORTS_BIG_ENDIAN

	select SYS_SUPPORTS_KGDB

	select TOSHIBA_BOARDS

	select GENERIC_HARDIRQS_NO__DO_IRQ

	help

	  This Toshiba board is based on the TX4927 processor. Say Y here to
@@ -811,7 +651,6 @@ config TOSHIBA_RBTX4938 
	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_SUPPORTS_BIG_ENDIAN

	select SYS_SUPPORTS_KGDB

	select TOSHIBA_BOARDS

	select GENERIC_HARDIRQS_NO__DO_IRQ

	help

	  This Toshiba board is based on the TX4938 processor. Say Y here to
@@ -819,11 +658,11 @@ config TOSHIBA_RBTX4938 


endchoice



source "arch/mips/au1000/Kconfig"

source "arch/mips/ddb5xxx/Kconfig"

source "arch/mips/gt64120/ev64120/Kconfig"

source "arch/mips/jazz/Kconfig"

source "arch/mips/lasat/Kconfig"

source "arch/mips/momentum/Kconfig"

source "arch/mips/pmc-sierra/Kconfig"

source "arch/mips/sgi-ip27/Kconfig"

source "arch/mips/sibyte/Kconfig"
@@ -923,11 +762,6 @@ config GENERIC_ISA_DMA 
config I8259

	bool



config LIMITED_DMA

	bool

	select HIGHMEM

	select SYS_SUPPORTS_HIGHMEM



config MIPS_BONITO64

	bool
@@ -1013,33 +847,6 @@ config MIPS_RM9122 
config PCI_MARVELL

	bool



config SOC_AU1000

	bool

	select SOC_AU1X00



config SOC_AU1100

	bool

	select SOC_AU1X00



config SOC_AU1500

	bool

	select SOC_AU1X00



config SOC_AU1550

	bool

	select SOC_AU1X00



config SOC_AU1200

	bool

	select SOC_AU1X00



config SOC_AU1X00

	bool

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_APM_EMULATION

	select SYS_SUPPORTS_KGDB



config SERIAL_RM9000

	bool
@@ -1081,9 +888,9 @@ config WDT_RM9000 
choice

	prompt "Galileo Chip Clock"

	#default SYSCLK_83 if MIPS_EV64120

	depends on MIPS_EV64120 || MOMENCO_OCELOT || MOMENCO_OCELOT_G

	depends on MIPS_EV64120 || MOMENCO_OCELOT

	default SYSCLK_83 if MIPS_EV64120

	default SYSCLK_100 if MOMENCO_OCELOT || MOMENCO_OCELOT_G

	default SYSCLK_100 if MOMENCO_OCELOT



config SYSCLK_75

	bool "75" if MIPS_EV64120
@@ -1092,7 +899,7 @@ config SYSCLK_83 
	bool "83.3" if MIPS_EV64120



config SYSCLK_100

	bool "100" if MIPS_EV64120 || MOMENCO_OCELOT || MOMENCO_OCELOT_G

	bool "100" if MIPS_EV64120 || MOMENCO_OCELOT



endchoice
@@ -1131,9 +938,6 @@ config ARC64 
config BOOT_ELF64

	bool



config TOSHIBA_BOARDS

	bool



menu "CPU selection"



choice
@@ -1557,6 +1361,7 @@ config MIPS_MT_SMP 
	bool "Use 1 TC on each available VPE for SMP"

	depends on SYS_SUPPORTS_MULTITHREADING

	select CPU_MIPSR2_IRQ_VI

	select CPU_MIPSR2_IRQ_EI

	select CPU_MIPSR2_SRS

	select MIPS_MT

	select NR_CPUS_DEFAULT_2
@@ -1572,6 +1377,7 @@ config MIPS_MT_SMTC 
	#depends on CPU_MIPS64_R2		# once there is hardware ...

	depends on SYS_SUPPORTS_MULTITHREADING

	select CPU_MIPSR2_IRQ_VI

	select CPU_MIPSR2_IRQ_EI

	select CPU_MIPSR2_SRS

	select MIPS_MT

	select NR_CPUS_DEFAULT_8
@@ -1584,6 +1390,8 @@ config MIPS_MT_SMTC 
config MIPS_VPE_LOADER

	bool "VPE loader support."

	depends on SYS_SUPPORTS_MULTITHREADING

	select CPU_MIPSR2_IRQ_VI

	select CPU_MIPSR2_IRQ_EI

	select MIPS_MT

	help

	  Includes a loader for loading an elf relocatable object

arch/mips/Makefile

+22 −20
Original line number Diff line number Diff line
@@ -342,15 +342,6 @@ core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \ 
cflags-$(CONFIG_MOMENCO_OCELOT)	+= -Iinclude/asm-mips/mach-ocelot

load-$(CONFIG_MOMENCO_OCELOT)	+= 0xffffffff80100000



#

# Momentum Ocelot-G board

#

# The Ocelot-G setup.o must be linked early - it does the ioremap() for the

# mips_io_port_base.

#

core-$(CONFIG_MOMENCO_OCELOT_G)	+= arch/mips/momentum/ocelot_g/

load-$(CONFIG_MOMENCO_OCELOT_G)	+= 0xffffffff80100000



#

# Momentum Ocelot-C and -CS boards

#
@@ -387,17 +378,6 @@ core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/ 
cflags-$(CONFIG_BASLER_EXCITE)	+= -Iinclude/asm-mips/mach-excite

load-$(CONFIG_BASLER_EXCITE)	+= 0x80100000



#

# Momentum Jaguar ATX

#

core-$(CONFIG_MOMENCO_JAGUAR_ATX)	+= arch/mips/momentum/jaguar_atx/

cflags-$(CONFIG_MOMENCO_JAGUAR_ATX)	+= -Iinclude/asm-mips/mach-ja

#ifdef CONFIG_JAGUAR_DMALOW

#load-$(CONFIG_MOMENCO_JAGUAR_ATX)	+= 0xffffffff88000000

#else

load-$(CONFIG_MOMENCO_JAGUAR_ATX)	+= 0xffffffff80100000

#endif



#

# NEC DDB

#
@@ -729,3 +709,25 @@ archclean: 
CLEAN_FILES += vmlinux.32 \

	       vmlinux.64 \

	       vmlinux.ecoff



quiet_cmd_syscalls_n32 = CALL-N32 $<

      cmd_syscalls_n32 = $(CONFIG_SHELL) $< $(CC) $(c_flags) -mabi=n32



quiet_cmd_syscalls_o32 = CALL-O32 $<

      cmd_syscalls_o32 = $(CONFIG_SHELL) $< $(CC) $(c_flags) -mabi=32



PHONY += missing-syscalls-n32 missing-syscalls-o32



missing-syscalls-n32: scripts/checksyscalls.sh FORCE

	$(call cmd,syscalls_n32)



missing-syscalls-o32: scripts/checksyscalls.sh FORCE

	$(call cmd,syscalls_o32)



archprepare:

ifdef CONFIG_MIPS32_N32

	$(Q)$(MAKE) $(build)=arch/mips missing-syscalls-n32

endif

ifdef CONFIG_MIPS32_O32

	$(Q)$(MAKE) $(build)=arch/mips missing-syscalls-o32

endif

arch/mips/au1000/Kconfig

0 → 100644
+142 −0
Original line number Diff line number Diff line 
choice

	prompt "Machine type"

	depends on MACH_ALCHEMY

	default MIPS_DB1000



config MIPS_MTX1

	bool "4G Systems MTX-1 board"

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select RESOURCES_64BIT if PCI

	select SOC_AU1500

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_BOSPORUS

	bool "Alchemy Bosporus board"

	select SOC_AU1500

	select DMA_NONCOHERENT

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_DB1000

	bool "Alchemy DB1000 board"

	select SOC_AU1000

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select RESOURCES_64BIT if PCI

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_DB1100

	bool "Alchemy DB1100 board"

	select SOC_AU1100

	select DMA_NONCOHERENT

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_DB1200

	bool "Alchemy DB1200 board"

	select SOC_AU1200

	select DMA_COHERENT

	select MIPS_DISABLE_OBSOLETE_IDE

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_DB1500

	bool "Alchemy DB1500 board"

	select SOC_AU1500

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select MIPS_DISABLE_OBSOLETE_IDE

	select RESOURCES_64BIT if PCI

	select SYS_SUPPORTS_BIG_ENDIAN

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_DB1550

	bool "Alchemy DB1550 board"

	select SOC_AU1550

	select HW_HAS_PCI

	select DMA_NONCOHERENT

	select MIPS_DISABLE_OBSOLETE_IDE

	select RESOURCES_64BIT if PCI

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_MIRAGE

	bool "Alchemy Mirage board"

	select DMA_NONCOHERENT

	select SOC_AU1500

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_PB1000

	bool "Alchemy PB1000 board"

	select SOC_AU1000

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select RESOURCES_64BIT if PCI

	select SWAP_IO_SPACE

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_PB1100

	bool "Alchemy PB1100 board"

	select SOC_AU1100

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select RESOURCES_64BIT if PCI

	select SWAP_IO_SPACE

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_PB1200

	bool "Alchemy PB1200 board"

	select SOC_AU1200

	select DMA_NONCOHERENT

	select MIPS_DISABLE_OBSOLETE_IDE

	select RESOURCES_64BIT if PCI

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_PB1500

	bool "Alchemy PB1500 board"

	select SOC_AU1500

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select RESOURCES_64BIT if PCI

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_PB1550

	bool "Alchemy PB1550 board"

	select SOC_AU1550

	select DMA_NONCOHERENT

	select HW_HAS_PCI

	select MIPS_DISABLE_OBSOLETE_IDE

	select RESOURCES_64BIT if PCI

	select SYS_SUPPORTS_LITTLE_ENDIAN



config MIPS_XXS1500

	bool "MyCable XXS1500 board"

	select DMA_NONCOHERENT

	select SOC_AU1500

	select SYS_SUPPORTS_LITTLE_ENDIAN



endchoice



config SOC_AU1000

	bool

	select SOC_AU1X00



config SOC_AU1100

	bool

	select SOC_AU1X00



config SOC_AU1500

	bool

	select SOC_AU1X00



config SOC_AU1550

	bool

	select SOC_AU1X00



config SOC_AU1200

	bool

	select SOC_AU1X00



config SOC_AU1X00

	bool

	select SYS_HAS_CPU_MIPS32_R1

	select SYS_SUPPORTS_32BIT_KERNEL

	select SYS_SUPPORTS_APM_EMULATION

	select SYS_SUPPORTS_KGDB

arch/mips/basler/excite/excite_device.c

+8 −8
Original line number Diff line number Diff line
@@ -68,7 +68,7 @@ enum { 




static struct resource

	excite_ctr_resource __attribute__((unused)) = {

	excite_ctr_resource __maybe_unused = {

		.name		= "GPI counters",

		.start		= 0,

		.end		= 5,
@@ -77,7 +77,7 @@ static struct resource 
		.sibling	= NULL,

		.child		= NULL

	},

	excite_gpislice_resource __attribute__((unused)) = {

	excite_gpislice_resource __maybe_unused = {

		.name		= "GPI slices",

		.start		= 0,

		.end		= 1,
@@ -86,7 +86,7 @@ static struct resource 
		.sibling	= NULL,

		.child		= NULL

	},

	excite_mdio_channel_resource __attribute__((unused)) = {

	excite_mdio_channel_resource __maybe_unused = {

		.name		= "MDIO channels",

		.start		= 0,

		.end		= 1,
@@ -95,7 +95,7 @@ static struct resource 
		.sibling	= NULL,

		.child		= NULL

	},

	excite_fifomem_resource __attribute__((unused)) = {

	excite_fifomem_resource __maybe_unused = {

		.name		= "FIFO memory",

		.start		= 0,

		.end		= 767,
@@ -104,7 +104,7 @@ static struct resource 
		.sibling	= NULL,

		.child		= NULL

	},

	excite_scram_resource __attribute__((unused)) = {

	excite_scram_resource __maybe_unused = {

		.name		= "Scratch RAM",

		.start		= EXCITE_PHYS_SCRAM,

		.end		= EXCITE_PHYS_SCRAM + EXCITE_SIZE_SCRAM - 1,
@@ -113,7 +113,7 @@ static struct resource 
		.sibling	= NULL,

		.child		= NULL

	},

	excite_fpga_resource __attribute__((unused)) = {

	excite_fpga_resource __maybe_unused = {

		.name		= "System FPGA",

		.start		= EXCITE_PHYS_FPGA,

		.end		= EXCITE_PHYS_FPGA + EXCITE_SIZE_FPGA - 1,
@@ -122,7 +122,7 @@ static struct resource 
		.sibling	= NULL,

		.child		= NULL

	},

	excite_nand_resource __attribute__((unused)) = {

	excite_nand_resource __maybe_unused = {

		.name		= "NAND flash control",

		.start		= EXCITE_PHYS_NAND,

		.end		= EXCITE_PHYS_NAND + EXCITE_SIZE_NAND - 1,
@@ -131,7 +131,7 @@ static struct resource 
		.sibling	= NULL,

		.child		= NULL

	},

	excite_titan_resource __attribute__((unused)) = {

	excite_titan_resource __maybe_unused = {

		.name		= "TITAN registers",

		.start		= EXCITE_PHYS_TITAN,

		.end		= EXCITE_PHYS_TITAN + EXCITE_SIZE_TITAN - 1,

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