drm/i915: Pass crtc_state to update_scanline_offset (f2bdd112) · Commits · 戴 / test

drivers/gpu/drm/i915/intel_display.c

+6 −5

Original line number	Diff line number	Diff line
		@@ -12102,8 +12102,9 @@ intel_modeset_verify_disabled(struct drm_device *dev,
		verify_disabled_dpll_state(dev);
		}

		static void update_scanline_offset(struct intel_crtc *crtc)
		static void update_scanline_offset(const struct intel_crtc_state *crtc_state)
		{
		struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
		struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

		/*
		@@ -12134,7 +12135,7 @@ static void update_scanline_offset(struct intel_crtc *crtc)
		* answer that's slightly in the future.
		*/
		if (IS_GEN2(dev_priv)) {
		const struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
		const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
		int vtotal;

		vtotal = adjusted_mode->crtc_vtotal;
		@@ -12143,7 +12144,7 @@ static void update_scanline_offset(struct intel_crtc *crtc)

		crtc->scanline_offset = vtotal - 1;
		} else if (HAS_DDI(dev_priv) &&
		intel_crtc_has_type(crtc->config, INTEL_OUTPUT_HDMI)) {
		intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
		crtc->scanline_offset = 2;
		} else
		crtc->scanline_offset = 1;
		@@ -12497,7 +12498,7 @@ static void intel_update_crtc(struct drm_crtc *crtc,
		to_intel_plane(crtc->primary));

		if (modeset) {
		update_scanline_offset(intel_crtc);
		update_scanline_offset(pipe_config);
		dev_priv->display.crtc_enable(pipe_config, state);

		/* vblanks work again, re-enable pipe CRC. */
		@@ -15673,7 +15674,7 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)

		drm_calc_timestamping_constants(&crtc->base,
		&crtc_state->base.adjusted_mode);
		update_scanline_offset(crtc);
		update_scanline_offset(crtc_state);
		}

		dev_priv->min_cdclk[crtc->pipe] = min_cdclk;

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